Method of manufacturing a semiconductor memory device

Abstract

Manufacturing a semiconductor memory by first forming a first insulating layer covering a conductive pad. Next forming and pattering a bit line conductive layer and a second insulating layer to expose a part of the first insulating layer. A third insulating layer covering the exposed surfaces of the first insulating layer is formed. Exposing an upper surface of the bit line conductive layer pattern and an upper surface of the third insulating layer. Removing part of the third insulating layer and first insulating layer to expose the conductive pad. Forming a spacer on the side walls of the bit line conductive layer pattern and the first insulating layer. An insulating layer pattern and a second spacer layer are respectively formed on the bit line conductive layer pattern and on a side wall of the first spacer and a conductive plug, which is in contact with the conductive pad is formed.

1 . A method for manufacturing a semiconductor device, said device including a buried contact plug and a buried contact pad, 
 forming a bit line having a sidewall, and    forming a spacer layers covering said sidewall of said bit line, said spacer layers having a particular thickness, said spacer layers defining a contact area between said buried contact plug and said buried contact pad,    said spacer layers insulating said the bit line from the buried contact plug by said particular thickness, and the contact area between the buried contact plug and the buried contact pad being maximized.    
   
   
       2 . The method recited in  claim 1  wherein said bit line is made of tungsten.