Etching apparatus for semicondutor fabrication

Abstract

Method of operating an apparatus which allows etching different substrate etch areas of a substrate having different pattern densities at essentially the same etch rate. The apparatus includes (a) a chamber; (b) an anode and a cathode in the chamber; and (c) a bias power system coupled to the cathode, wherein the cathode includes multiple cathode segments. The operation method is as follows. A substrate to be etched is placed between the anode and cathode, wherein the substrate includes N substrate etch areas, and the N substrate etch areas are directly above the N cathode segments. N bias powers are determined which when being applied to the N cathode segments during an etching of the substrate, will result in essentially a same etch rate for the N substrate etch areas. Then, the bias power system is used to apply the N bias powers the N cathode segments.

1 . An apparatus operating method, comprising: 
 providing (i) a chamber, (ii) an anode and a cathode positioned in the chamber, and (iii) a bias power system coupled to the cathode, wherein the cathode comprises N cathode segments electrically insulated from each other, N being an integer greater than 1;    placing a substrate to be etched between the anode and the cathode, wherein the structure comprises N substrate etch areas facing the anode, and wherein the N substrate etch areas are directly above the N cathode segments in a reference direction and match in size and shape with the N cathode segments, wherein the reference direction is essentially perpendicular to a surface of the anode facing the cathode;    determining N bias powers which, when being applied one-to-one to the N cathode segments during an etching of the substrate, will result in essentially a same etch rate for the N substrate etch areas; and    using the bias power system to apply the N bias powers one-to-one to the N cathode segments during the etching of the substrate.    
   
   
       2 . The method of  claim 1 , wherein said determining the N bias powers comprises the steps of: 
 (i) etching a first test substrate using the steps (b) and (d), wherein the N bias powers are predetermined;    (ii) examining the first test substrate after step (i) is performed;    (iii) adjusting the N bias powers based on a result of step (ii); and    (iv) repeating steps (i), (ii) and (iii) for at least one additional test substrate until step (ii) results in essentially the same etch rate for the N substrate etch areas.    
   
   
       3 . The method of  claim 1 , wherein said determining the N bias powers comprises: 
 determining N pattern densities for the N substrate etch areas; and    using a database to determine the N bias powers based on the N pattern densities, wherein the database contains correlations between bias powers, pattern densities, and etch rates.    
   
   
       4 . The method of  claim 3 , wherein the correlations between bias powers, pattern densities, and etch rates are determined from empirical data.  
   
   
       5 . The method of  claim 1 , wherein said using the bias power system comprises using N bias power subsystems of the bias power system to apply the N bias powers one-to-one to the N cathode segments, wherein the N bias power subsystems are coupled one-to-one to the N cathode segments.  
   
   
       6 . The method of  claim 1 , wherein said using the bias power system comprises: 
 using a bias power subsystem of the bias power system to generate a total bias power to an impedance dividing circuit of the bias power system; and    in response to the impedance dividing circuit receiving the total bias power, using the impedance dividing circuit to generate the N bias powers one-to-one to the N cathode segments.    
   
   
       7 . An apparatus operating method, comprising: 
 providing (i) a chamber, (ii) an anode and a cathode positioned in the chamber, and (iii) a bias power system coupled to the cathode, wherein the cathode comprises N cathode segments electrically insulated from each other, N being an integer greater than 1;    placing a substrate to be etched between the anode and the cathode, wherein the substrate comprises N substrate etch areas facing the anode, and wherein the N substrate etch areas are directly above the N cathode segments in a reference direction and match in size and shape with the N cathode segments, wherein the reference direction is essentially perpendicular to a surface of the anode facing the cathode;    applying a plasma generation power to the anode sufficiently to generate a plasma in the chamber; and    applying N bias powers one-to-one to the N cathode segments.    
   
   
       8 . The method of  claim 7 , wherein the N bias powers are such that N substrate etch areas of the substrate experience essentially a same etch rate.  
   
   
       9 . The method of  claim 7 , wherein said applying the N bias powers comprises using N bias power subsystems of the bias power system to apply the N bias powers one-to-one to the N cathode segments, wherein the N bias power subsystems are coupled one-to-one to the N cathode segments.  
   
   
       10 . The method of  claim 7 , wherein said applying the N bias powers comprises: 
 using a bias power subsystem of the bias power system to generate a total bias power to an impedance dividing circuit of the bias power system; and    in response to the impedance dividing circuit receiving the total bias power, using the impedance dividing circuit to generate the N bias powers one-to-one to the N cathode segments.