Structure comprising a barrier layer of a tungsten alloy comprising cobalt and/or nickel

Abstract

An interconnection structure comprising a substrate having a dielectric layer with a via opening therein; wherein the opening has an underlayer of cobalt and/or nickel therein, barrier layer of an alloy of cobalt and/or nickel; and tungsten is provided.

1 . A method for fabricating an electronic structure which comprises forming an insulating material on a substrate; lithographically defining and forming recesses for lines and/or via in the insulating material in which interconnection conductor material will be deposited;
 blanket depositing an underlayer of cobalt, nickel or both;   electrodepositing on the underlayer a barrier layer of an alloy comprising at least one member selected from the group consisting of cobalt, nickel and mixtures thereof; and tungsten.   
     
     
         2 . The method of  claim 1  which further comprises depositing copper or a copper alloy on the barrier layer to fill the recesses. 
     
     
         3 . The method of  claim 1  wherein the copper or copper alloy is deposited by electro-chemical deposition directly onto the barrier layer. 
     
     
         4 . The method of  claim 2  which further comprises planarizing the structure. 
     
     
         5 . The method of  claim 1  wherein the blanket depositing is sputtering or CVD. 
     
     
         6 . The method of  claim 1  wherein the underlayer comprises cobalt. 
     
     
         7 . The method of  claim 1  wherein the barrier layer comprises cobalt-tungsten alloy. 
     
     
         8 . The method of  claim 1  wherein the alloy comprises at least about 2 atomic percent of tungsten. 
     
     
         9 . The method of  claim 1  wherein the alloy comprises about 15 atomic percent of tungsten. 
     
     
         10 . The method of  claim 1  wherein the alloy comprises about 19 atomic percent of tungsten and is an alloy of cobalt-tungsten and phosphorous. 
     
     
         11 . The method of  claim 10  wherein alloy comprises about 2 to about 10 percent phosphorous. 
     
     
         12 . The method of  claim 1  wherein the barrier layer is about 5 to about 200 nanometers thick. 
     
     
         13 . The method of  claim 1  wherein the dielectric layer comprises silicon dioxide. 
     
     
         14 . The method of  claim 1  wherein the via opening is about 100 to about 500 nanometers thick. 
     
     
         15 . The method of  claim 1  wherein the underlayer is about 10 to about 200 nanometers thick. 
     
     
         16 . The method of  claim 1  wherein the blanket depositing is PVD or IPVD.