US2008251932A1PendingUtilityA1
Method of forming through-silicon vias with stress buffer collars and resulting devices
Est. expiryJun 28, 2025(expired)· nominal 20-yr term from priority
H10W 72/20H10W 20/0265H10W 20/0234H10W 20/0242H10W 20/023H10P 14/40H10D 64/011
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Claims
Abstract
A method of forming a via having a stress buffer collar, wherein the stress buffer collar can absorb stress resulting from a mismatch in the coefficients of thermal expansion of the surrounding materials. Other embodiments are described and claimed.
Claims
exact text as granted — not AI-modified1 - 21 . (canceled)
22 . A device comprising:
a die comprised of a first material; a via extending into the die; a layer of a buffer material disposed in the via; and a second material disposed over the buffer layer within the via; wherein the buffer layer is capable of absorbing stress due to a thermal expansion mismatch between the first and second materials.
23 . The device of claim 22 , wherein the die includes a front side and an opposing back side, and wherein circuitry is formed on the die front side and an interconnect structure is disposed over the die front side.
24 . The device of claim 23 , wherein the via extends from the die back side to a conductor in the interconnect structure, and wherein the second material comprises a conductive material.
25 . The device of claim 24 , wherein the conductive material comprises copper and the die comprises silicon.
26 . The device of claim 24 , wherein the die is bonded to a second die.
27 - 32 . (canceled)Cited by (0)
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