US2008284025A1PendingUtilityA1

Electrically Conductive Line

48
Assignee: PAN QIPriority: Mar 7, 2005Filed: Jul 15, 2008Published: Nov 20, 2008
Est. expiryMar 7, 2025(expired)· nominal 20-yr term from priority
H10D 64/0112H10P 14/44H10D 64/01312H10W 20/0375H10W 20/40H10W 20/031H10D 64/663H10B 12/488
48
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Claims

Abstract

The invention includes an electrically conductive line, methods of forming electrically conductive lines, and methods of reducing titanium silicide agglomeration in the fabrication of titanium silicide over polysilicon transistor gate lines. In one implementation, a method of forming an electrically conductive line includes providing a silicon-comprising layer over a substrate. An electrically conductive layer is formed over the silicon-comprising layer. An MSi x N y -comprising layer is formed over the electrically conductive layer, where “x” is from 0 to 3.0, “y” is from 0.5 to 10, and “M” is at least one of Ta, Hf, Mo, and W. An MSi z -comprising layer is formed over the MSi x N y -comprising layer, where “z” is from 1 to 3.0. A TiSi a -comprising layer is formed over the MSi z -comprising layer, where “a” is from 1 to 3.0. The silicon-comprising layer, the electrically conductive layer, the MSi x N y -comprising layer, the MSi z -comprising layer, and the TiSi a -comprising layer are patterned into a stack comprising an electrically conductive line. Other aspects and implementations are contemplated.

Claims

exact text as granted — not AI-modified
1 - 34 . (canceled) 
     
     
         35 . An electrically conductive line comprising:
 a conductively doped silicon-comprising layer;   an electrically conductive layer received over the conductively doped silicon-comprising layer;   an MSi x N y -comprising layer received over the electrically conductive layer, where “x” is greater than zero and less than or equal to 3.0, “y” is from 0.5 to 10, and “M” is at least one of Ta, Hf, Mo, and W;   an MSi z -comprising layer received over the MSi x N y -comprising layer, where “z” is from 1 to 3.0; and   a TiSi a -comprising layer received over the MSi z -comprising layer, where “a” is from 1 to 3.0.   
     
     
         36 . Memory integrated circuitry incorporating the electrically conductive line of  claim 35 . 
     
     
         37 . An electronic system incorporating the electrically conductive line of  claim 35 . 
     
     
         38 . The conductive line of  claim 35  wherein “x” is at least 1. 
     
     
         39 . The conductive line of  claim 35  wherein the MSi z -comprising layer is received on the MSi x N y -comprising layer. 
     
     
         40 . The conductive line of  claim 39  wherein the TiSi a -comprising layer is received on the MSi z -comprising layer. 
     
     
         41 . The conductive line of  claim 35  wherein the electrically conductive layer is void of detectable nitrogen. 
     
     
         42 . The conductive line of  claim 35  wherein the electrically conductive layer comprises MSi w , where “w” is from 1 to 3.0. 
     
     
         43 . The conductive line of  claim 42  wherein the electrically conductive layer and the MSi z -comprising layer are of the same composition. 
     
     
         44 . The conductive line of  claim 42  wherein the electrically conductive layer and the MSi z -comprising layer are of different compositions. 
     
     
         45 . The conductive line of  claim 42  wherein the MSi x N y -comprising layer is received on the MSi w . 
     
     
         46 . The conductive line of  claim 42  wherein the MSi z -comprising layer is received on the MSi x N y -comprising layer. 
     
     
         47 . The conductive line of  claim 42  wherein the MSi x N y -comprising layer is received on the MSi w  and the MSi z -comprising layer is received on the MSi x N y -comprising layer. 
     
     
         48 . The conductive line of  claim 42  wherein the MSi x N y -comprising layer is received on the MSi w , the MSi z -comprising layer is received on the MSi x N y -comprising layer, and the TiSi a -comprising layer is received on the MSi z -comprising layer. 
     
     
         49 . The conductive line of  claim 48  wherein the MSi w  is received on the silicon-comprising layer. 
     
     
         50 . The conductive line of  claim 35  wherein the electrically conductive layer, the MSi x N y -comprising layer, and the MSi z -comprising layer have a combined thickness which is less than that of the TiSi a -comprising layer. 
     
     
         51 . The conductive line of  claim 35  wherein the electrically conductive layer, the MSi x N y -comprising layer, and the MSi z -comprising layer have a combined thickness which is less than that of the silicon-comprising layer. 
     
     
         52 . The conductive line of  claim 35  wherein the electrically conductive layer, the MSi x N y -comprising layer, and the MSi z -comprising layer have a combined thickness which is less than that of each of the TiSi a -comprising layer and the silicon-comprising layer. 
     
     
         53 . The conductive line of  claim 35  wherein the electrically conductive layer and the MSi z -comprising layer have respective thicknesses from 5 Angstroms to 500 Angstroms. 
     
     
         54 . The conductive line of  claim 35  wherein the MSi x N y -comprising layer has a thickness from 10 Angstroms to 500 Angstroms. 
     
     
         55 . The conductive line of  claim 54  wherein the MSi x N y -comprising layer has a thickness from 10 Angstroms to 50 Angstroms. 
     
     
         56 . The conductive line of  claim 35  wherein the conductive line comprises a transistor gate line received over a gate dielectric. 
     
     
         57 . The conductive line of  claim 35  wherein M comprises Ta. 
     
     
         58 . The conductive line of  claim 35  wherein M comprises at least one of Hf, Mo and W. 
     
     
         59 . An electrically conductive line comprising:
 a conductively doped silicon-comprising layer;   an MSi w -comprising layer received on the silicon-comprising layer, where “w” is from 1 to 3.0 and “M” is at least one of Ta, Hf, Mo, and W, the MSi w -comprising layer having a thickness from 5 Angstroms to 500 Angstroms;   an MSi x N y -comprising layer received on the MSi w -comprising layer, where “x” is from 1 to 3.0 and “y” is from 0.5 to 10, the MSi x N y -comprising layer having a thickness from 10 Angstroms to 500 Angstroms;   an MSi z -comprising layer received on the MSi x N y -comprising layer, where “z” is from 1 to 3.0, the MSi z -comprising layer having a thickness from 5 Angstroms to 500 Angstroms; and   a TiSi a -comprising layer received on the MSi z -comprising layer, where “a” is from 1 to 3.0, the TiSi a -comprising layer having a thickness from 100 Angstroms to 1000 Angstroms. The conductive line of claim  0  wherein each of the MSi w -comprising layer, the MSi x N y -comprising layer, and the MSi z -comprising layer has a thickness no greater than 50 Angstroms.   
     
     
         60 . The conductive line of  claim 59  wherein each of the MSi w -comprising layer, the MSi x N y -comprising layer, and the MSi w -comprising layer has a thickness no greater than 50 Angstroms. 
     
     
         61 . The conductive line of  claim 59  wherein the MSi w -comprising layer and the MSi z -comprising layer are of the same composition. 
     
     
         62 . The conductive line of  claim 59  wherein the MSi w -comprising layer and the MSi z -comprising layer are of different compositions.

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