Semiconductor Package-on-Package System Including Integrated Passive Components

Abstract

A semiconductor system ( 300 ) has one or more packaged active subsystems ( 310, 330 ); each subsystem has a substrate with electrical contact pads and one or more semiconductor chips stacked on top of each other, assembled on the substrate. The system further has a packaged passive subsystem ( 320 ) including a substrate with electrical contacts and passive electrical components, such as resistors, capacitors, and indictors. The passive subsystem is stacked with the active subsystems and connected to them by solder bodies.

1 . A semiconductor system comprising:
 a first device, a second device, and a third device; and   in which the first device including a first insulating substrate having a first surface and a second surface and electrical contact pads on the first surface and the second surface; and a first semiconductor chip affixed on the first surface; and   in which the second device including a second insulating substrate paralleling the first substrate having a third surface and a fourth surface and electrical contact pads on the third surface and the fourth surface; and a second semiconductor chip affixed on the third surface; and metal reflow bodies joining the electrical contact pads on the fourth surface and the electrical contact pads on the first surface; the first surface covered by molding compound and the fourth surface not covered by molding compound; and   in which the third device including a third insulating substrate paralleling the first substrate having a fifth surface and a sixth surface and electrical contact pads on the fifth surface and the sixth surface; and passive electrical components affixed on the fifth surface; and metal reflow bodies joining the electrical contact pads on the third surface and the electrical contact pads on the sixth surface, which is not covered by molding compound; and   molding compound covering the passive devices and the fifth surface from edge to edge.   
   
   
       2 . The system according to  claim 1  in which the passive electrical components include resistors, capacitors, and inductors. 
   
   
       3 . The system according to  claim 1  in which the first semiconductor chip includes a stacked semiconductor chips electrically connected to contact pads on the first substrate surface. 
   
   
       4 . The system according to  claim 1  in which the second semiconductor chip includes a stacked semiconductor chips electrically connected to contact pads on the third substrate surface. 
   
   
       5 . A method for fabricating a semiconductor system comprising the steps of:
 affixing a first semiconductor chip to a first surface of a first insulating substrate;   electrically connecting the first semiconductor chip to contact pads on the first surface of the first substrate;   encapsulating the first surface including the first semiconductor chip with a molding compound except the contact pads;   affixing a second semiconductor chip to a third surface of a second insulating substrate;   electrically connecting the second semiconductor chip to contact pads on the third surface of the second substrate;   encapsulating the third surface including the second semiconductor chip with a molding compound except the contact pads;   joining a fourth surface of the second substrate and the first surface of the first substrate with metal reflow bodies;   affixing a passive electrical component to a fifth surface of a third insulating substrate;   electrically connecting the passive electrical component to contact pads on the fifth surface of the third substrate;   encapsulating the fifth surface including the passive electrical component with a molding compound from edge to edge; and   joining a sixth surface of the third substrate and the fifth surface of the second substrate with metal reflow bodies.   
   
   
       6 . The method according to  claim 5 , in which the first substrate adapted to be singulated into individual packaged semiconductor systems. 
   
   
       7 . The method according to  claim 6  further including the step of singulating the first substrate into individual packaged semiconductor systems. 
   
   
       8 . The method according to  claim 5  further including the step of attaching metal reflow bodies to the contact pads on the first surface. 
   
   
       11 . The method according to  claim 5 , in which the first semiconductor chip includes a stack of semiconductor chips, each chip flip-chip bonded or wire-bonded to the first substrate. 
   
   
       12 . The method according to  claim 5 , in which the second semiconductor chip includes a stack of semiconductor chips, each chip flip-chip bonded or wire-bonded to the second substrate. 
   
   
       13 . The method according to  claim 5 , in which the passive electrical component includes a plurality of passive electrical components including resistors and capacitors. 
   
   
       14 . The method according to  claim 13 , in which the passive electrical component further includes an inductor.