Capacitor-embedded printed circuit board and manufacturing method thereof

Abstract

A capacitor-embedded printed circuit board and a method of manufacturing the printed circuit board are disclosed. The capacitor-embedded printed circuit board includes: an insulation layer, a first electrode formed on one side of the insulation layer, a second electrode formed on one side of the first electrode, a dielectric layer formed on one side of the second electrode, and a third electrode formed on one side of the dielectric layer. By forming the electrodes of the capacitor in a dual structure, deviations in contact area may be minimized between the second electrode and the dielectric layer, so that ultimately, errors in capacitance may be reduced.

1 . A capacitor-embedded printed circuit board comprising:
 an insulation layer;   a first electrode formed on one side of the insulation layer;   a second electrode formed on one side of the first electrode;   a dielectric layer formed on one side of the second electrode; and   a third electrode formed on one side of the dielectric layer.   
   
   
       2 . The capacitor-embedded printed circuit board of  claim 1 , wherein the first electrode and the second electrode are made from materials reacting to different etchants. 
   
   
       3 . The capacitor-embedded printed circuit board of  claim 1 , wherein a thickness of the second electrode is lower than or equal to a thickness of the first electrode. 
   
   
       4 . A method of manufacturing a capacitor-embedded printed circuit board using a first conductive layer formed on one side of an insulation layer, the method comprising:
 forming a second conductive layer on one side of the first conductive layer;   forming a second electrode by removing a portion of the second conductive layer;   forming a first electrode by removing a portion of the first conductive layer in correspondence with the second electrode; and   forming a dielectric layer on one side of the second electrode.   
   
   
       5 . The method of  claim 4 , wherein forming the second conductive layer is performed by at least one method selected from a group consisting of electroplating, electroless plating, vacuum deposition, sputtering, and chemical vapor deposition (CVD). 
   
   
       6 . The method of  claim 4 , wherein the first electrode and the second electrode are made from materials reacting to different etchants,
 forming the second electrode comprises:
 removing a portion of the second conductive layer by applying a second etchant to a portion of the second conductive layer, 
   and forming the first electrode comprises:
 removing a portion of the first conductive layer by applying a first etchant to a portion of the first conductive layer. 
   
   
   
       7 . The method of  claim 4 , further comprising, before forming the dielectric layer:
 filling an insulating material in positions where the portion of the first conductive layer and the portion of the second conductive layer are removed.   
   
   
       8 . The method of  claim 4 , further comprising, after forming the dielectric layer:
 forming a third conductive layer on one side of the dielectric layer; and   forming a third electrode by removing a portion of the third conductive layer in correspondence with the second electrode.   
   
   
       9 . The method of  claim 4 , wherein the dielectric layer has a third conductive layer formed on one side thereof. 
   
   
       10 . The method of  claim 9 , further comprising, after forming the dielectric layer:
 forming a third electrode by removing a portion of the third conductive layer in correspondence with the second electrode.