US2009111213A1PendingUtilityA1

High-Density Fine Line Structure And Method Of Manufacturing The Same

Assignee: CHANG CHIEN-WEIPriority: Jun 30, 2007Filed: Dec 31, 2008Published: Apr 30, 2009
Est. expiryJun 30, 2027(~0.9 yrs left)· nominal 20-yr term from priority
H05K 3/205H05K 1/186H05K 2201/10515H05K 2203/049H05K 2201/10674H10W 74/00H10W 90/291H10W 90/724H10W 72/884H10W 74/15H10W 72/5363H10W 72/536H10W 90/754H10W 90/00H10W 72/07236H10W 72/07204H10W 72/20H10W 72/07251H10P 72/7424H10P 72/74H10W 74/016H10W 70/05
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Claims

Abstract

A high-density fine line structure mainly includes: two boards with similar structures and a dielectric film for combing the two boards. Semiconductor devices respectively in two boards are opposite to each other after the two boards are combined. The two boards each include a fine line circuit, an insulated layer on the same surface, and the semiconductor device installed above the fine line circuit. The surface of the circuit, which is not covered by a solder mask, is made into a pad. The pad is filled with the tin balls for electrically connecting with another semiconductor device. Electroplating rather than the etching method is used for forming the fine line circuit layer, and a carrier and a metal barrier layer, which are needed during or at the end of the manufacturing process, are removed to increase the wiring density for realizing the object of high-density.

Claims

exact text as granted — not AI-modified
1 . A manufacturing method of a high-density fine line structure, comprising:
 (a) forming a metal barrier layer on a carrier;   (b) forming a patterned photoresist layer on the metal barrier layer, and the patterned photoresist layer having a photoresist opening;   (c) transmitting a plating current through the metal barrier layer, and forming a fine line circuit layer on the metal barrier layer in the photoresist opening;   (d) removing the patterned photoresist layer;   (e) filling in an insulated layer on the metal barrier layer and at the side of the fine line circuit layer;   (f) installing a first semiconductor device above the fine line circuit layer;   (g) installing a second semiconductor device above a fine line circuit layer by processing the step (a) to the step (f) again.   (h) combing a first board formed in the step (a) to the step (f) and a second board formed in the step (g) to be a single board by a dielectric film; and   (i) removing the carrier and the metal barrier layer of the first board and the second board, and exposing the fine line circuit layer, and parts of the fine line circuit layer are able to be a tin ball pad, as is used for filling in a tin ball.   
     
     
         2 . The method as claimed in  claim 1 , further comprising: selectively forming a solder mask on the fine line circuit layer, and the other surface of the fine line circuit layer which is not covered by the solder mask is to be made into a pad. 
     
     
         3 . The method as claimed in  claim 2 , wherein the pad, which is filled with the tin balls, is electrically connected with a third semiconductor device. 
     
     
         4 . The method as claimed in  claim 3 , wherein the third semiconductor device is installed on the fine line circuit layer by using wire bonding or flip chip. 
     
     
         5 . The method as claimed in  claim 1 , wherein the first semiconductor device or the second semiconductor device is installed on the fine line circuit layer by using wire bonding or flip chip.

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