Semiconductor device, method for making pattern layout, method for making mask pattern, method for making layout, method for manufacturing photo mask, photo mask, and method for manufacturing semiconductor device

Abstract

A semiconductor device includes a semiconductor substrate, and a circuit pattern group comprising at least N (≧2) circuit pattern on the semiconductor substrate, at least one vicinity of end portion among the at least of N circuit patterns including a connection area to electrically connect to a circuit pattern in another circuit pattern group different from the circuit pattern group, the at least N wirings pattern including a circuit pattern N1 and at least one circuit pattern Ni (i≧2) arranged in one direction different from longitudinal direction of the circuit pattern N1, the at least one circuit patterns Ni having larger i being arranged at further position away from the circuit pattern N1, and in terms of a pattern including the connection area among the at least of Ni circuit patterns, the larger the i, the connection area being arranged at a further position in longitudinal direction.

1 . (canceled) 
   
   
       2 . A semiconductor device comprising:
 a semiconductor substrate; and   a circuit pattern group comprising at least N (N≦3) pieces of circuit patterns provided on the semiconductor substrate,
 at least one of the N pieces of the circuit patterns including a connection area to electrically connect to a circuit pattern in another circuit pattern group being different from the circuit pattern group, 
 the N pieces of the circuit patterns including a circuit pattern N1 and at least two circuit patterns Ni (i≧2) arranged in one direction being different from a longitudinal direction of the circuit pattern N1, 
 the at least two circuit patterns Ni having larger i being arranged at a further position away from the circuit pattern N1, 
 the at least two circuit patterns Ni including at least one circuit patterns Np (2≦p<N) and at least one circuit patterns Nq (p<q≦N), 
 the at least one circuit pattern Np having larger p including a longer dimension in the longitudinal direction, and 
 the at least one circuit pattern Nq having larger q including a shorter dimension in the longitudinal direction. 
   
   
   
       3 . The semiconductor device according to  claim 2 , wherein in a case where number of the at least circuit pattern Np is smaller than that of the at least one circuit pattern Nq, the dimension of the circuit pattern Nq having smallest q in the longitudinal direction is larger than that of the circuit pattern Np having largest p in the longitudinal direction, and
 in a case where number of the at least circuit pattern Np is larger than that of the at least one circuit pattern Nq, the dimension of the circuit pattern Nq having smallest q in the longitudinal direction is smaller than that of the circuit pattern Np having largest p in the longitudinal direction.   
   
   
       4 - 7 . (canceled) 
   
   
       8 . A method for making a pattern layout, comprising:
 defining a circuit pattern N1 and a circuit pattern N1′ as a reference for arranging N (N≧3) pieces of circuit patterns in a circuit pattern group, the circuit pattern N1 and the circuit pattern N1′ having same longitudinal direction, the circuit pattern N1′ being arranged at a position away from the circuit pattern N1 by a constant distance in one direction being different from the longitudinal direction, and each of N pieces of the circuit patterns including a connection area to electrically connect to a circuit pattern in a circuit pattern group being different from the circuit pattern group;   arranging the N pieces (N≧3) of the circuit patterns except the circuit patterns N1 and N1′ between the circuit patterns N1 and N1′ including
 arranging at least circuit pattern Np (2≧p<N), the at least circuit pattern Np having larger p being arranged at a further position away from the circuit pattern N1, 
 in a case where at least circuit pattern Np (p<q<N) is remained in the N pieces (N≧3) of the circuit patterns except the circuit patterns N1 and N1′ after the arranging the at least circuit pattern Np, arranging at least circuit pattern Nq, the at least circuit pattern Nq having larger q being arranged at a further position away from the circuit pattern N1′; and 
   enlarging the at least one circuit pattern Np in the longitudinal direction, the at least one circuit pattern Np having larger p being more enlarged including
 in a case where at least circuit pattern Nq is remained, shortening the at least circuit pattern Nq in the longitudinal direction, the at least circuit pattern Nq having larger q being more shortened and 
 enlarging or shortening dimension in the longitudinal direction of the circuit pattern Nq having smallest q than that of the circuit pattern Np having larges p. 
   
   
   
       9 . The method for making a pattern layout according to  claim 8 , wherein in a case where number of the at least circuit pattern Np is smaller than that of the at least one circuit pattern Nq, the dimension of the circuit pattern Nq having smallest q in the longitudinal direction is enlarged than that of the circuit pattern Np having largest p in the longitudinal direction, and in a case where number of the at least circuit pattern Np is larger than that of the at least one circuit pattern Nq, the dimension of the circuit pattern Nq having smallest q in the longitudinal direction is shortened than that of the circuit pattern Np having largest p in the longitudinal direction. 
   
   
       10 - 13 . (canceled) 
   
   
       14 . A photo mask, comprising:
 a transparent substrate which is transparent to light for exposure; and   a pattern corresponding to a plurality of circuit pattern of a circuit pattern group comprising at least N (N≧2) pieces of circuit patterns provided on the semiconductor substrate,
 at least one vicinity of end portion among the at least of N pieces of circuit patterns including a connection area to electrically connect to a circuit pattern in another circuit pattern group being different from the circuit pattern group, 
 the N pieces of circuit patterns including a circuit pattern N1 and at least one circuit pattern Ni (i≧2) arranged in one direction being different from a longitudinal direction of the circuit pattern N1, 
 the at least one circuit pattern Ni having larger i being arranged at a further position away from the circuit pattern N1, and at least one connection area in and in terms of at least one circuit pattern including the connection area among the at least one circuit pattern Ni, the larger the i, the connection area being arranged at a further position in the longitudinal direction. 
   
   
   
       15 - 20 . (canceled)