Stackable Package By Using Internal Stacking Modules

Abstract

A semiconductor package comprises a substrate, a first semiconductor die mounted to the substrate, and a first double side mold (DSM) internal stackable module (ISM) bonded directly to the first semiconductor die through a first adhesive. The first DSM ISM includes a first molding compound, and a second semiconductor die disposed in the first molding compound. The semiconductor package further comprises a first electrical connection coupled between the first semiconductor die and the substrate, and a second electrical connection coupled between the first DSM ISM and the substrate.

1 . A semiconductor package, comprising:
 a substrate having a plurality of bumps;   a first semiconductor die mounted to the substrate;   a first double side mold (DSM) internal stackable module (ISM) in physical contact with the first semiconductor die through a first adhesive to reduce a height of the semiconductor package, the first DSM ISM including,
 (a) a first molding compound, 
 (b) a second semiconductor die disposed in the first molding compound, 
 (c) a third semiconductor die disposed in the first molding compound, and 
 (d) a platform disposed between the second semiconductor die and third semiconductor die and extending beyond the first molding compound, the second semiconductor die being electrically connected to the third semiconductor die through conductive traces formed in the platform; 
   a second DSM ISM in physical contact with the first DSM ISM through a second adhesive;   a first electrical contact connecting the first semiconductor die to a first one of the plurality of bumps; and   a second electrical contact connecting the platform to a second one of the plurality of bumps, wherein the second electrical contact is a bump.   
     
     
         2 . The semiconductor package of  claim 1 , the second DSM ISM comprising:
 a second molding compound;   a fourth semiconductor die disposed in the second molding compound; and   a fifth semiconductor die disposed in the second molding compound.   
     
     
         3 . The semiconductor package of  claim 2 , further comprising a third electrical contact coupled between a second platform extending from the second DSM ISM and a third one of the plurality of bumps. 
     
     
         4 . The semiconductor package of  claim 1 , further comprising an encapsulant surrounding the first semiconductor die and the first DSM ISM. 
     
     
         5 . The semiconductor package of  claim 4 , further comprising an interposer disposed above the first DSM ISM, the interposer being electrically connected to the platform of the first DSM ISM. 
     
     
         6 . The semiconductor package of  claim 5 , further comprising an exposed mold area in the encapsulant above the interposer. 
     
     
         7 . A semiconductor package, comprising:
 a substrate;   a first semiconductor die mounted to the substrate;   a first double side mold (DSM) internal stackable module (ISM) in physical contact with the first semiconductor die through a first adhesive to reduce a height of the semiconductor package, the first DSM ISM including,
 (a) a molding compound, 
 (b) a second semiconductor die disposed in the molding compound, 
 (c) a third semiconductor die disposed in the molding compound, and 
 (d) a platform disposed between the second semiconductor die and third semiconductor die and extending beyond the molding compound; 
   a first electrical connection coupled between the first semiconductor die and the substrate; and   a second electrical connection coupled between the platform and the substrate.   
     
     
         8 . The semiconductor package of  claim 7 , further comprising a second DSM ISM in physical contact with the first DSM ISM through a second adhesive, the second DSM ISM including fourth and fifth semiconductor die disposed in the second DSM ISM. 
     
     
         9 . The semiconductor package of  claim 7 , wherein the second semiconductor die is electrically connected to the third semiconductor die through conductive traces formed in the platform. 
     
     
         10 . The semiconductor package of  claim 7 , wherein the second electrical contact includes a bond wire or solder bump. 
     
     
         11 . The semiconductor package of  claim 7 , further comprising an encapsulant deposited over the first semiconductor die and the first DSM ISM. 
     
     
         12 . The semiconductor package of  claim 7 , further comprising an interposer disposed over the first DSM ISM, the interposer being electrically connected to the platform. 
     
     
         13 . A semiconductor package, comprising:
 a substrate;   a first semiconductor die mounted to the substrate;   a first double side mold (DSM) internal stackable module (ISM) in physical contact with the first semiconductor die through a first adhesive;   a second DSM ISM in physical contact with the first DSM ISM through a second adhesive;   a first electrical connection coupled between the first semiconductor die and the substrate; and   a second electrical connection coupled between the first DSM ISM and the substrate.   
     
     
         14 . The semiconductor package of  claim 13 , wherein the first DSM ISM comprises:
 a first molding compound;   a second semiconductor die disposed in the first molding compound;   a third semiconductor die disposed in the first molding compound; and   a platform disposed between the second semiconductor die and third semiconductor die and extending beyond the first molding compound.   
     
     
         15 . The semiconductor package of  claim 14 , further comprising a second DSM ISM bonded to a surface of the first DSM ISM with a second adhesive, the second DSM ISM comprising:
 a second molding compound abutting the second adhesive;   a fourth semiconductor die disposed in the second molding compound; and   a fifth semiconductor die disposed in the second molding compound.   
     
     
         16 . The semiconductor package of  claim 14 , wherein the second semiconductor die is electrically connected to the third semiconductor die through conductive traces formed in the platform. 
     
     
         17 . The semiconductor package of  claim 13 , wherein the second electrical contact includes a bond wire or solder bump. 
     
     
         18 . The semiconductor package of  claim 13 , further including an encapsulant deposited over the first semiconductor die and the first DSM ISM. 
     
     
         19 . The semiconductor package of  claim 13 , further including an interposer disposed over the first DSM ISM, the interposer being electrically connected to the platform. 
     
     
         20 . A method of manufacturing a semiconductor package comprising:
 providing a substrate;   attaching a first semiconductor die to the substrate;   providing a first double side mold (DSM) internal stackable module (ISM);   attaching the first DSM ISM to the first semiconductor die with a first adhesive;   electrically coupling the first semiconductor die to the substrate; and   electrically coupling the first DSM ISM to the substrate.   
     
     
         21 . The method of  claim 20 , wherein attaching the first DSM ISM to the first semiconductor die comprises directly attaching a first molding compound of the first DSM ISM to the first semiconductor die with the first adhesive. 
     
     
         22 . The method of  claim 20 , wherein providing the first DSM ISM comprises:
 embedding a second semiconductor die within the first molding compound;   embedding a first platform within the first molding compound and extending from the first molding compound; and   electrically connecting the first platform to the second semiconductor die.   
     
     
         23 . The method of  claim 22 , wherein providing the first DSM ISM further comprises:
 embedding a third semiconductor die within the first molding compound such that the first platform is disposed between the second semiconductor die and the third semiconductor die; and   electrically connecting the third semiconductor die to the first platform.   
     
     
         24 . The method of  claim 23 , wherein electrically connecting the second and third semiconductor dies to the first platform comprises:
 forming first conductive traces through the first platform; and   electrically connecting the second semiconductor die to the third semiconductor die with the first conductive traces.   
     
     
         25 . The method of  claim 20 , further comprising providing a second DSM ISM, wherein providing a second DSM ISM comprises:
 embedding a fourth semiconductor die within a second molding compound;   embedding a fifth semiconductor die within the second molding compound;   embedding a second platform within the second molding compound and extending from the second molding compound such that the second platform is disposed between the fourth and fifth semiconductor dies;   forming second conductive traces through the second platform;   electrically connecting the fourth semiconductor die to the fifth semiconductor die with the second conductive traces; and   attaching the second molding compound directly to the first molding compound using a second adhesive.