Switching device having a molybdenum oxynitride metal gate

Abstract

A field effect transistor (FET) includes a body region and a source region disposed at least partially in the body region. The FET also includes a drain region disposed at least partially in the body region and a molybdenum oxynitride (MoNO) gate. The FET also includes a dielectric having a high dielectric constant (k) disposed between the body region and the MoNO gate.

1 . A field effect transistor (FET) comprising:
 a body region;   a source region disposed at least partially in the body region;   a drain region disposed at least partially in the body region;   a molybdenum oxynitride (MoNO) gate; and   a dielectric having a high dielectric constant (k) disposed between the body region and the MoNO gate.   
     
     
         2 . The FET of  claim 1 , wherein the body region is formed of a N-type semiconductor material. 
     
     
         3 . The FET of  claim 1 , wherein the source region and the drain region are formed of a P-type semiconductor material. 
     
     
         4 . The FET of  claim 1 , wherein a region between the source region and drain region forms a channel and wherein channel is formed between at least a portion the high k dielectric and a portion of the body. 
     
     
         5 . The FET of  claim 1 , wherein a portion of at least one of the source region and drain region is disposed between the high k dielectric and the body region. 
     
     
         6 . The FET of  claim 1 , wherein k is above 3. 
     
     
         7 . The FET of  claim 1 , wherein k is between 4 and 100. 
     
     
         8 . A method of forming a field effect transistor (FET), the method comprising:
 forming a high k dielectric layer over a body region;   forming a molybdenum nitride (MoN x ) layer over the high k dielectric layer; and   converting the MoN x  to molybdenum oxynitride (MoNO).   
     
     
         9 . The method of  claim 8 , wherein converting includes exposing the MoN x  to O 2 . 
     
     
         10 . The method of  claim 9 , wherein the MoN x  is exposed to 0.1 torr to 10 torr O 2 . 
     
     
         11 . The method of  claim 9 , wherein the MoN x  is exposed to 1 torr O 2  at a temperature of about 450° C. 
     
     
         12 . The method of  claim 8 , further comprising:
 annealing the FET at a temperature in excess of 500° C.   
     
     
         13 . The method of  claim 12 , wherein annealing includes annealing the FET at a temperature of about 1000° C. 
     
     
         14 . The method of  claim 8 , wherein forming the MoN x  layer includes:
 depositing a layer of molybdenum (Mo) having a thickness of about 2 nanometers (nm); and   exposing the Mo layer to 100 millitorr of NH 3 .   
     
     
         15 . The method of  claim 8 , wherein forming the MoN x  layer includes:
 depositing molybdenum (Mo) to a thickness of about 5 nm in an NH 3  ambient.   
     
     
         16 . The method of  claim 8 , wherein forming the MoNx layer includes:
 depositing molybdenum (Mo) while a beam of nitrogen (N) is directed at the FET.