Nano-wire field effect transistor, method for manufacturing the transistor, and integrated circuit including the transistor
Abstract
Provided is a method for fabricating a nano-wire field effect transistor including steps of: preparing a nano-wire field effect transistor including two columnar members made of a silicon crystal configuring a nano-wire on a substrate are arranged on a substrate in parallel and one above the other, and an SOI substrate having a (100) surface orientation; processing a silicon crystal layer configuring the SOI substrate into a standing plate-shaped member having a rectangular cross-section; processing the silicon crystal by orientation dependent wet etching and thermal oxidation into a shape where two triangular columnar members are arranged one above the other with a spacing from each other as to face along the ridge lines of the triangular columnar members; and processing the triangular columnar member into a circular columnar member configuring a nano-wire by hydrogen-annealing or a thermal oxidation; and an integrated circuit including the transistor.
Claims
exact text as granted — not AI-modified1 . A nano-wire field effect transistor, characterized in that an even number of columnar members configuring nano-wires and being made from silicon crystal are arranged over a substrate one above the other and in parallel direction to a surface of the substrate.
2 . The nano-wire field effect transistor in accordance with claim 1 , characterized in that a plurality set of the even number of columnar members are arranged in parallel.
3 . The nano-wire field effect transistor in accordance with claim 1 or 2 , characterized in that the silicon crystal is an SOI (Silicon-On-Insulator) layer configuring an SOT (Silicon-On-Insulator) substrate.
4 . The nano-wire field effect transistor in accordance with claim 3 , characterized in that the SOT substrate has a (100) surface orientation, and that the columnar member is a circular columnar member.
5 . The nano-wire field effect transistor in accordance with claim 4 , characterized in that around the circular columnar member a gate electrode is formed via a gate insulator film.
6 . An integrated circuit including the nano-wire field effect transistor in accordance with any of claim 1 to claim 5 .
7 . The integrated circuit in accordance with claim 6 , further including the nano-wire field effect transistor which lacks an upper columnar member in an even number of columnar members configuring nano-wires.
8 . A manufacturing method of the nano-wire field effect transistor, comprising steps of:
preparing an SOI substrate having a (100) surface orientation; processing a silicon crystal layer comprising the SOI substrate into a standing plate-shaped member having a rectangular cross-section; processing the silicon crystal layer by orientation dependent wet etching and thermal oxidation into a shape where two triangular columnar members are arranged one above the other with a spacing from each other so as to face along the ridge lines of the triangular columnar members; and processing the two triangular columnar members into a circular columnar member configuring a nano-wire by hydrogen annealing or thermal oxidation.
9 . A manufacturing method of the nano-wire field effect transistor, comprising steps of:
preparing an SOI substrate having a (100) surface orientation and including two or more SOI layers and buried oxide films; processing a silicon crystal layer configuring the SOI layer into a standing plate-shaped member having a rectangular cross-section; processing the silicon crystal layer by orientation dependent wet etching and thermal oxidation into a shape where two triangular columnar members are arranged one above the other with a spacing from each other so as to face along the ridge lines of the triangular columnar members; and processing the two triangular columnar members into a circular columnar member comprising a nano-wire by hydrogen annealing or thermal oxidation.Join the waitlist — get patent alerts
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