Semiconductor body with a buried material layer and method

Abstract

Disclosed is a method for forming a buried material layer in a semiconductor body, and a semiconductor arrangement including a buried material layer.

1 . A method for forming a buried material layer in a semiconductor body, the method comprising:
 providing a semiconductor body having a first surface, and having at least one first trench extending from the first surface into the semiconductor body, the at least one first trench having a bottom, and having at least one sidewall;   forming a first material layer on the bottom of the at least one trench, the first material layer leaving at least one segment of at least one sidewall uncovered; and   filling the at least one first trench by epitaxially growing a semiconductor material from at least one uncovered sidewall segment.   
     
     
         2 . The method of  claim 1 , wherein the first material layer is one of an electrically insulating layer, and an electrically conducting layer. 
     
     
         3 . The method of  claim 1 , wherein the electrically insulating layer is an oxide layer, a nitride layer, an oxy-nitride layer, or a stack of one or more of these materials. 
     
     
         4 . The method of  claim 1 , wherein the electrically conducting layer is a metal layer, a carbide layer, a silicide layer, a doped semiconductor layer, or a stack of one or more of these materials. 
     
     
         5 . The method of  claim 1 , wherein forming the first material layer on the bottom of the at least one trench comprises:
 depositing the first material layer on the bottom of the trench using a deposition process.   
     
     
         6 . The method of  claim 5 , further comprising:
 depositing the first material layer on the at least one sidewall;   removing the first material layer from at least one segment of at least one sidewall before filling the at least one first trench, thereby obtaining the at least one uncovered sidewall segment.   
     
     
         7 . The method of  claim 5 , wherein the deposition process is selected to have a higher deposition rate on the bottom of the at least one trench than on the at least one sidewall. 
     
     
         8 . The method of  claim 7 , wherein the deposition process is an HDP process, a sputter process, or a chemical vapor deposition process. 
     
     
         9 . The method of  claim 1 , wherein forming the first material layer on the bottom of the least one trench involves leaving the first surface uncovered; and
 wherein semiconductor material is grown on the first surface during the step of filling the at least one first trench.   
     
     
         10 . The method of  claim 1 , further comprising:
 forming the first material layer on the first surface while forming the first material layer on the bottom of the at least one first trench, the first material layer preventing semiconductor material from being grown on the first surface when filling the at least one first trench;   removing the first material layer from the first surface after filling the at least one first trench.   
     
     
         11 . The method of  claim 12 , wherein removing the first material layer from the first surface involves one of an etching process, and a polishing process. 
     
     
         12 . The method of  claim 1 , wherein the at least one sidewall of the at least one first trench is tapered. 
     
     
         13 . The method of  claim 12 , wherein the taper angle is between 0° and 30° or between 0° and 10°. 
     
     
         14 . The method of  claim 1 , further comprising:
 forming a plurality of first trenches, the trenches being distant to one another and separated from one another by mesa regions;   after filling the first trenches:
 a) forming second trenches in the mesa regions at least once, the second trenches extending from the first surface in a vertical direction into the semiconductor body, the second trenches each having a bottom, and having at least one sidewall; 
 b) forming second material layers on the bottom of the second trenches, second material layers leaving at least one segment of at least one sidewall of each of the second trenches uncovered; 
 c) filling the second trenches by epitaxially growing a semiconductor material on at least one uncovered sidewall segment of each second trench. 
   
     
     
         15 . The method of  claim 14 , wherein method steps a) to c) are repeated until the mesa regions left after forming the first trenches are completely removed by forming the second trenches and are replaced by the epitaxially grown semiconductor material. 
     
     
         16 . The method of  claim 14 , wherein the first and the second material layers are of the same material. 
     
     
         17 . The method of  claim 14 , wherein the bottom of the second trenches in the vertical direction lies between the level of an upper surface of the first material layers and below the level of a lower surface of the first material layers. 
     
     
         18 . The method of  claim 14 , wherein the second trenches are formed such that they overlap the first material layers in a lateral direction of the semiconductor body. 
     
     
         19 . The method of  claim 18 , wherein the second trenches are etched, and wherein the first material layers act as etch stop when forming the second trenches. 
     
     
         20 . The method of  claim 1 , wherein the at least one first trench in a horizontal plane has one of a rectangular, an elliptical or a polygonal geometry. 
     
     
         21 . The method of  claim 1 , wherein the at least one first trench in a horizontal plane has one of a ring-shaped, a meander-like or a spiral geometry. 
     
     
         22 . A semiconductor arrangement comprising:
 a semiconductor body having a first surface;   a buried material layer in the semiconductor body;   the buried material layer being arranged distant to the first surface, a monocrystalline semiconductor material being arranged between the material layer and the first surface, and a monocrystalline semiconductor material adjoining the material layer in a lateral direction of the semiconductor body.   
     
     
         23 . The semiconductor arrangement of  claim 22 , wherein the buried material layer is completely surrounded by a monocrystalline semiconductor material in the semiconductor body. 
     
     
         24 . The semiconductor arrangement of  claim 22 , wherein the semiconductor body has a first surface and the first material layer is essentially parallel to the first surface. 
     
     
         25 . The semiconductor arrangement of  claim 22 , wherein the material layer is a dielectric layer. 
     
     
         26 . The semiconductor arrangement of  claim 22 , wherein the material layer comprises a number of first and second material layers that are arranged next to one another in the lateral direction. 
     
     
         27 . The semiconductor arrangement of  claim 22 , further comprising:
 a further material layer adjoining the material layer and extending in a vertical direction.   
     
     
         28 . The semiconductor arrangement of  claim 27 , wherein the further material extends to the first surface and completely surrounds a semiconductor region between the material layer and the first side.