Strain-direct-on-insulator (sdoi) substrate and method of forming

Abstract

Methods (and semiconductor substrates produced therefrom) of fabricating (n−1) SDOI substrates using n wafers is described. A donor substrate (e.g., silicon) includes a buffer layer (e.g., SiGe) and a plurality of multi-layer stacks formed thereon having alternating stress (e.g., relaxed SiGe) and strain (e.g., silicon) layers. An insulator is disposed adjacent an outermost strained silicon layer. The outermost strained silicon layer and underlying relaxed SiGe layer is transferred to a handle substrate by conventional or known bonding and separation methods. The handle substrate is processed to remove the relaxed SiGe layer thereby producing an SDOI substrate for further use. The remaining donor substrate is processed to remove one or more layers to expose another strained silicon layer. Various processing steps are repeated to produce another SDOI substrate as well as a remaining donor substrate, and the steps may be repeated to produce n−1 SDOI substrates.

1 . A semiconductor substrate comprising:
 a first substrate, comprising,
 a first base substrate, 
 a buffer layer, and 
 a plurality of multi-layer structures, each multi-layer structure comprising at least one stress layer and at least one strained layer; and 
   a second substrate comprising a second base substrate bonded to the first substrate, wherein the plurality of multi-layer structures are disposed between the first base substrate and the second base substrate.   
     
     
         2 . The semiconductor substrate in accordance with  claim 1  wherein the first substrate further comprises an insulator disposed adjacent the at least one strained layer of a one of the plurality of multi-layer substrates, and the second substrate is bonded to the insulator. 
     
     
         3 . The semiconductor substrate in accordance with  claim 2  wherein each multi-layer structure comprises:
 a first relaxed SiGe layer; 
 a first strained silicon layer disposed on the first relaxed SiGe layer; 
 a second relaxed SiGe layer; and 
 a second strained silicon layer disposed on the second relaxed SiGe layer. 
 
     
     
         4 . The semiconductor substrate in accordance with  claim 3  wherein the first relaxed SiGe layer is greater in thickness than the second relaxed SiGe layer. 
     
     
         5 . The semiconductor substrate in accordance with  claim 1  wherein the buffer layer is a composition-graded SiGe layer. 
     
     
         6 - 21 . (canceled) 
     
     
         22 . The semiconductor substrate in accordance with  claim 1  wherein the first and second stress layers are relaxed SiGe layers and the first and second strained layers are strained silicon layers. 
     
     
         23 . A semiconductor substrate for use in an integrated circuit fabrication process, the semiconductor substrate comprising:
 a base substrate;   a buffer layer on the base substrate   a multi-layer structure on the buffer layer, wherein the base substrate, buffer layer and multi-layer structure form a first substrate, and wherein the multi-layer structure comprises,
 a first stress layer, 
 a first strained layer on the first stress layer, 
 a second stress layer above the first strained layer, and 
 a second strained layer above the on the second stress layer; and 
   a second substrate bonded to the first substrate in a configuration such that the buffer layer and the multi-layer structure are disposed between the base substrate and the second substrate.   
     
     
         24 . The semiconductor substrate in accordance with  claim 23  further comprising:
 an insulator on the second strained layer within the multi-layer structure on the first substrate; and 
 wherein the second substrate is bonded to the insulator. 
 
     
     
         25 . The semiconductor substrate in accordance with  claim 23  wherein the first stress layer has a thickness greater than a thickness of the second stress layer. 
     
     
         26 . The semiconductor substrate in accordance with  claim 23  wherein the buffer layer comprises a composition-graded SiGe layer. 
     
     
         27 . The semiconductor substrate in accordance with  claim 23  wherein the first and second stress layers are relaxed SiGe layers and the first and second strained layers are strained silicon layers. 
     
     
         28 . A strain-silicon-direct-on-insulator (SSDOI) semiconductor substrate wafer for use in further integrated circuit (IC) processing, the SSDOI semiconductor substrate comprising:
 a first base substrate;   a base layer formed on the first base substrate;   a first plurality of layers above the base layer, the first plurality of layers comprising,
 a first stress layer, 
 a first strained layer on the first stress layer, 
 a second stress layer above the first strained layer, and 
 a second strained layer on the second stress layer; 
   a second plurality of layers formed above the first plurality of layers, the second plurality of layers comprising,
 a third stress layer, 
 a third strained layer on the third stress layer, 
 a fourth stress layer above the third strained layer, and 
 a fourth strained layer on the fourth stress layer; and 
   a second substrate bonded to the first base substrate in a configuration such that the base layer and the first and second plurality of layers are disposed between the first base substrate and the second substrate.   
     
     
         29 . The SSDOI semiconductor substrate in accordance with  claim 28  further comprising:
 an insulator formed on the fourth strained layer within second plurality of layers; and 
 wherein the second substrate is bonded to the insulator. 
 
     
     
         30 . The SSDOI semiconductor substrate in accordance with  claim 28  wherein the first and third stress layers each have a thickness greater than a thickness of the second and fourth stress layers, respectively. 
     
     
         31 . The SSDOI semiconductor substrate in accordance with  claim 28  wherein the base layer comprises a composition-graded SiGe layer. 
     
     
         32 . The SSDOI semiconductor substrate in accordance with  claim 28  wherein the first, second, third and fourth stress layers are relaxed SiGe layers and the first, second, third and fourth strained layers are strained silicon layers.