Reflective mask, manufacturing method for reflective mask, and manufacturing method for semiconductor device

Abstract

A reflective mask comprising: a reflective layer that is arranged on a surface on a side on which EUV light is irradiated and reflects the EUV light; a buffer layer containing Cr that is arranged on a side of the reflective layer on which the EUV light is irradiated and covers an entire surface of the reflective layer; and a non-reflective layer that is arranged on a side of the buffer layer on which the EUV light is irradiated and in which an absorber that absorbs the irradiated EUV light is arranged in a position corresponding to a mask pattern to be reduced and transferred onto a wafer.

1 .- 20 . (canceled) 
     
     
         21 . A manufacturing method for a semiconductor device, comprising:
 manufacturing a semiconductor device using a reflective mask that reflects EUV light to a wafer, the reflective mask including a reflective layer that reflects the EUV light, a buffer layer containing Cr that is arranged on the reflective layer and covers an entire surface of the reflective layer, and an absorber, arranged on the reflective layer, to absorb the EUV light, the absorber being used as   a mask pattern to be reduced and transferred onto a wafer, wherein   a thickness of the buffer layer is selected such that a difference between a first contrast and a second contrast falls in an allowable range,   the first contrast being a contrast between the EUV light reflected on the reflective layer and with which the wafer is irradiated, and the EUV light reflected on the absorber and with which the wafer is irradiated when the buffer layer is arranged only below the absorber, and   the second contrast being a contrast between the EUV light reflected on the reflective layer and with which the wafer is irradiated, and the EUV light reflected on the absorber and with which the wafer is irradiated when the buffer layer is arranged on the entire surface of the reflective layer.   
     
     
         22 . The manufacturing method for a semiconductor device, according to  claim 21 , wherein a thickness of the buffer layer located below the absorber is larger than a thickness in a position where the absorber is not formed on the buffer layer. 
     
     
         23 . The manufacturing method for a semiconductor device, according to  claim 21 , wherein the reflective mask further includes a capping layer that covers the entire surface of the reflective layer between the reflective layer and the buffer layer, wherein
 a first exposure amount of the EUV light is an exposure amount necessary for forming a pattern on the wafer and a second exposure amount of the EUV light is an exposure amount necessary for forming a pattern on the wafer when the buffer layer is present only below the absorber, the thickness of the buffer layer is selected such that a difference between the first exposure amount and the second exposure amount falls in an allowable range.   
     
     
         24 . The manufacturing method for a semiconductor device, according to  claim 21 , wherein the reflective mask further includes a capping layer that covers the entire surface of the reflective layer between the reflective layer and the buffer layer, wherein
 the buffer layer covers the entire surface of the reflective layer by covering an entire surface of the capping layer.   
     
     
         25 . The manufacturing method for a semiconductor device, according to  claim 21 , wherein
 the reflective layer is an Mo/Si multilayer film formed by alternately stacking molybdenum and silicon, and   a top layer of the reflective layer and the buffer layer are directly set in contact with each other.   
     
     
         26 . The manufacturing method for a semiconductor device, according to  claim 21 , wherein the buffer layer is formed of Cr or a Cr compound. 
     
     
         27 . The manufacturing method for a semiconductor device, according to  claim 21 , wherein the thickness of the buffer layer is 5 nanometers to 6 nanometers. 
     
     
         28 . The manufacturing method for a semiconductor device, according to  claim 21 , wherein the thickness of the buffer layer is equal to or smaller than 3 nanometers. 
     
     
         29 . The manufacturing method for a semiconductor device, according to  claim 21 , wherein the thickness of the buffer layer is 4 nanometers to 5 nanometers. 
     
     
         30 . The manufacturing method for a semiconductor device, according to  claim 23 , wherein a material of the capping layer is a material containing silicon.