US2012062261A1PendingUtilityA1

Electrically Conductive Pins For Microcircuit Tester

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Assignee: NELSON JOHN EPriority: Sep 7, 2010Filed: Sep 7, 2011Published: Mar 15, 2012
Est. expirySep 7, 2030(~4.2 yrs left)· nominal 20-yr term from priority
G01R 1/06738G01R 1/06744G01R 31/2887G01R 31/2889Y10T29/49204G01R 1/0735H01R 43/16G01R 1/0416G01R 3/00G01R 31/2891
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Claims

Abstract

The terminals of a device under test are temporarily electrically connected to corresponding contact pads on a load board by a series of electrically conductive pin pairs. The pin pairs are held in place by an interposer membrane that includes a top contact plate facing the device under test, a bottom contact plate facing the load board, and a vertically resilient, non-conductive member between the top and bottom contact plates. Each pin pair includes a top and bottom pin, which extend beyond the top and bottom contact plates, respectively, toward the device under test and the load board, respectively. The top and bottom pins contact each other at an interface that is inclined with respect to the membrane surface normal. When compressed longitudinally, the pins translate toward each other by sliding along the interface.

Claims

exact text as granted — not AI-modified
We claim: 
     
         1 . A replaceable, longitudinally compressible membrane ( 10 ) for forming a plurality of temporary mechanical and electrical connections between a device under test ( 1 ) having a plurality of terminals ( 2 ) and a load board ( 3 ) having a plurality of contact pads ( 4 ), each contact pad ( 4 ) being laterally arranged to correspond to exactly one terminal ( 2 ), comprising:
 a flexible, electrically insulating top contact plate ( 40 ) longitudinally adjacent to the terminals ( 2 ) on the device under test ( 1 );   a flexible, electrically insulating bottom contact plate ( 60 ) longitudinally adjacent to the contact pads ( 4 ) on the load board ( 3 );   a longitudinally resilient, electrically insulating interposer ( 50 ) between the top and bottom contact plates ( 40 ,  60 );   a plurality of longitudinally compressible, electrically conductive pin pairs ( 20 ,  30 ) extending through longitudinal holes in the top contact plate ( 40 ), the interposer ( 50 ) and the bottom contact plate ( 60 ), each pin pair in the plurality being laterally arranged to correspond to exactly one terminal ( 2 ) on the device under test ( 1 );   the plurality of pin pairs including a top and bottom contact, the top contact having a top engagement surface which engages electrical connections to a device under test, said top engagement surface including a sharp longitudinal contact ridge rising above the engagement surface, said ridge extending at least along the major portion of the engagement surface;   wherein when a particular pin pair ( 20 ,  30 ) is longitudinally compressed, the pins ( 20 ,  30 ) in the pair slide past each other along a virtual interface surface ( 70 ) that is inclined with respect to a surface normal of the interposer ( 50 ).   
     
     
         2 . A method of lowering the resistance between a terminal on an integrated circuit and test fixture having
 an electrically conductive pin having a top surface engagable with the terminal, the method comprising;   forming the top surface to include a longitudinal ridge along the surface,   forming the ridge to have a sharp edge at its apex   
       whereby engagement of the ridge with the terminal will focus contact pressure over a small surface area and further cause ablation of oxides on the terminal. 
     
     
         3 . The membrane ( 10 ) of  claim 1 , wherein the two pins ( 20 ,  30 ) in the particular pin pair include mating surfaces ( 23 ,  33 ) that form the virtual interface surface ( 70 ) when brought together. 
     
     
         4 . The membrane ( 10 ) of  claim 1 , wherein the virtual interface surface ( 70 A) is generally planar. 
     
     
         5 . The membrane ( 10 ) of  claim 1 , wherein the virtual interface surface ( 70 B) is curved along one dimension. 
     
     
         6 . The membrane ( 10 ) of  claim 1 , wherein the virtual interface surface ( 70 C) is curved along two dimensions. 
     
     
         7 . The membrane ( 10 ) of  claim 1 , wherein the virtual interface surface ( 70 D) is saddle-shaped. 
     
     
         8 . The membrane ( 10 ) of  claim 1 , wherein the virtual interface surface ( 70 E) includes one or more locating features. 
     
     
         9 . The membrane ( 10 ) of  claim 1 , wherein the virtual interface surface includes one or more non-contiguous regions. 
     
     
         10 . The membrane ( 10 ) of  claim 9 , wherein the non-contiguous regions include collinear centers of curvature. 
     
     
         11 . The membrane ( 10 ) of  claim 9 , wherein the non-contiguous regions are separated by a matching groove and ridge disposed on the mating surfaces. 
     
     
         12 . The membrane ( 10 ) of  claim 1 , wherein one of the pins ( 20 ) in each pin pair ( 20 ,  30 ) includes a contact pad ( 21 ) capable of wiping through any oxide layers on the surface of the terminal ( 2 ) on the device under test ( 1 ). 
     
     
         13 . The membrane ( 10 ) of  claim 1 , wherein one of the pins ( 20 ) in each pin pair ( 20 ,  30 ) includes a textured contact pad ( 21 E) for contacting the terminal ( 2 ) on the device under test ( 1 ). 
     
     
         14 . The membrane ( 10 ) of  claim 1 , wherein one of the pins ( 20 ) in each pin pair ( 20 ,  30 ) includes a contact pad ( 21 ) having at least one rounded edge ( 25 ). 
     
     
         15 . The membrane ( 10 ) of  claim 1 , wherein one of the pins ( 20 ) in each pin pair ( 20 ,  30 ) includes an engagement feature ( 26 ) for securing the pin ( 20 ) to the top contact plate ( 40 ). 
     
     
         16 . The membrane ( 10 ) of  claim 1 , wherein one of the pins ( 20 ) in each pin pair ( 20 ,  30 ) includes a depression ( 26 ) for securing the pin ( 20 ) to the top contact plate ( 40 ). 
     
     
         17 . The membrane ( 10 ) of  claim 1 , wherein one of the pins ( 30 ) in each pin pair ( 20 ,  30 ) includes an engagement feature ( 36 ) for securing the pin ( 30 ) to the bottom contact plate ( 60 ). 
     
     
         18 . The membrane ( 10 ) of  claim 1 , wherein one of the pins ( 30 ) in each pin pair ( 20 ,  30 ) includes a depression ( 36 ) for securing the pin ( 30 ) to the bottom contact plate ( 60 ). 
     
     
         19 . The membrane ( 10 ) of  claim 1 , wherein the top contact plate ( 40 ) and the bottom contact plate ( 60 ) are made from a polyimide. 
     
     
         20 . The membrane ( 10 ) of  claim 1 , wherein the top contact plate ( 40 ) and the bottom contact plate ( 60 ) are made from kapton. 
     
     
         21 . The membrane ( 10 ) of  claim 1 , wherein the top contact plate ( 40 ) and the bottom contact plate ( 60 ) are made from polyetheretherketone (PEEK). 
     
     
         22 . The membrane ( 10 ) of  claim 1 , wherein the interposer ( 50 ) is made from foam. 
     
     
         23 . The membrane ( 10 ) of  claim 1 , wherein the interposer ( 50 ) is made from an elastomer. 
     
     
         24 . The membrane ( 10 ) of  claim 1 , wherein the interposer ( 50 ) includes at least one hollow region. 
     
     
         25 . The membrane ( 10 ) of  claim 1 , wherein the two pins in each pin pair ( 20 ,  30 ) are made from different metals. 
     
     
         26 . The membrane ( 10 ) of  claim 1 , wherein when a particular pin pair ( 20 ,  30 ) is longitudinally compressed between the terminal ( 2 ) on the device under test ( 1 ) and the contact pad ( 4 ) on the load board ( 3 ), one of the pins ( 30 ) remains stationary and in contact with the contact pad ( 4 ) on the load board ( 3 ), and the other of the pins ( 20 ) moves while maintaining contact with the terminal ( 2 ) on the device under test ( 1 ). 
     
     
         27 . The membrane ( 10 ) of  claim 25 , wherein the other of the pins ( 20 ) includes a relief feature ( 24 ) that avoids contact with the interposer ( 50 ) over the full range of the longitudinal compression. 
     
     
         28 . The membrane ( 10 ) of  claim 1 , wherein each terminal ( 2 ) on the device under test ( 1 ) corresponds to up to two contact pads ( 4 ) on the load board ( 3 ). 
     
     
         29 . The membrane ( 10 ) of  claim 1 , wherein each terminal ( 2 ) on the device under test ( 1 ) corresponds to exactly one contact pad ( 4 ) on the load board ( 3 ). 
     
     
         30 . The membrane ( 10 ) of  claim 1 , wherein at least two of the longitudinal holes in the top contact plate ( 40 ), the interposer ( 50 ) and the bottom contact plate ( 60 ) accommodate respective lateral alignment pins that extend therethrough. 
     
     
         31 . A test fixture ( 5 ), comprising:
 a membrane ( 10 ) extending laterally between a device under test ( 1 ) and a load board ( 3 ), the device under test ( 1 ) including a plurality of electrical terminals ( 2 ) arranged in a predetermined pattern, the load board ( 3 ) including a plurality of electrical contact pads ( 4 ) arranged in a predetermined pattern corresponding to that of the terminals ( 2 ), the membrane having a top side facing the terminals ( 2 ) of the device under test ( 1 ) and a bottom side facing the contact pads ( 4 ) of the load board ( 3 );   a plurality of electrical pin pairs ( 20 ,  30 ) supported by the membrane ( 10 ) in a predetermined pattern corresponding to that of the terminals ( 2 ), each pin pair in the plurality comprising:
 a top pin ( 20 ) extending through the top side of the membrane ( 10 ) and having a top pin mating surface ( 23 ); and 
 a bottom pin ( 30 ) extending through the bottom side of the membrane ( 10 ) and having a bottom pin mating surface ( 33 ); 
 wherein the top and bottom pin mating surfaces ( 23 ,  33 ) have complementary surface profiles; 
 wherein when the corresponding electrical terminal ( 2 ) is forced against the pin pair, the top and bottom pin mating surfaces ( 23 ,  33 ) slide along each other along a virtual interface surface ( 70 ); and 
 wherein the virtual interface surface ( 70 ) is inclined with respect to a surface normal of the membrane ( 10 ). 
   
     
     
         32 . The test fixture ( 5 ) of  claim 31 , wherein the membrane ( 10 ) includes a plurality of membrane layers. 
     
     
         33 . The test fixture ( 5 ) of  claim 32 , wherein at least two of the membrane layers in the plurality have different mechanical properties. 
     
     
         34 . The test fixture ( 5 ) of  claim 31 , wherein the membrane ( 10 ) is monolithic. 
     
     
         35 . A test fixture ( 5 ) for forming a plurality of temporary mechanical and electrical connections between a device under test ( 1 ) having a plurality of terminals ( 2 ) and a load board ( 3 ) having a plurality of contact pads ( 4 ), the terminals ( 2 ) and contact pads ( 4 ) being arranged in a one-to-one correspondence, comprising:
 a replaceable interposer membrane ( 10 ) disposed generally parallel to and adjacent to the load board ( 3 ), the interposer membrane ( 10 ) including a plurality of pin pairs ( 20 ,  30 ) arranged in a one-to-one correspondence with the plurality of terminals ( 2 ), each pin pair ( 20 ,  30 ) including a top pin ( 20 ) adjacent to the corresponding terminal ( 2 ) and extending into the interposer membrane, and a bottom pin ( 30 ) adjacent to the corresponding contact pad ( 4 ) and extending into the interposer membrane ( 10 );   wherein each contact pad ( 4 ) corresponding to a particular pin pair ( 20 ,  30 ) is configured to mechanically and electrically receive the terminal ( 2 ) on the device under test ( 1 ) corresponding to the particular pin pair ( 20 ,  30 ); and   wherein when the device under test ( 1 ) is attached to the test fixture ( 5 ),
 the top pins ( 20 ) contact the corresponding terminals ( 2 ) on the device under test ( 1 ), 
 the bottom pins ( 30 ) contact the corresponding contact pads ( 4 ) on the load board ( 3 ), 
 each top pin ( 20 ) contacts the corresponding bottom pin ( 30 ) along a virtual interface surface that is inclined with respect to a surface normal of the interposer membrane ( 10 ), and 
 the plurality of terminals ( 2 ) on the device under test ( 1 ) are electrically connected in a one-to-one correspondence to the plurality of contact pads ( 4 ) on the load board ( 3 ). 
   
     
     
         36 . The test fixture ( 5 ) of  claim 35 , wherein the membrane ( 10 ) includes a plurality of membrane layers. 
     
     
         37 . The test fixture ( 5 ) of  claim 36 , wherein at least two of the membrane layers in the plurality have different mechanical properties. 
     
     
         38 . The test fixture ( 5 ) of  claim 35 , wherein the membrane ( 10 ) is monolithic. 
     
     
         39 . An electrical contact pin for engagement with an a device under test having electrical contact array on an integrated circuit or similar device having a plurality of adjacent contacts, the pin being having a top surface, said top surface comprising:
 a projecting land extending generally orthogonally upwardly from said top surface, said projection including a generally narrow longitudinal contact area which is engagable with a contact of the integrated circuit, said contact area being substantially narrower than that of the top surface and the contact area having a surface area substantially less than that of the top surface.   
     
     
         40 . The pin of  claim 39  wherein said narrow contact area comprises a peak formed of two converging sidewalls rising from the top surface. 
     
     
         41 . The pin of  claim 40  wherein the sidewall are generally hemispherical. 
     
     
         42 . The pin of  claim 40  wherein the sidewalls are generally convex. 
     
     
         43 . The pin of  claim 40  wherein said sidewalls are first sidewalls generally hemispherical and further includes a secondary set of sidewall rising from the first sidewalls and converging to an apex. 
     
     
         44 . The pin of  claim 39  wherein said narrow contact area is flat and includes a pair of parallel sidewalls rising from the top surface, thereby creating a land. 
     
     
         45 . The pin of  claim 44  wherein said narrow contact surface area is an apex rising from said parallel sidewalls. 
     
     
         46 . The pin of  claim 39  wherein said projecting land include a plurality of adjacent spaced apart lands each having an apex for contacting a single integrated circuit contact at a plurality of point on said contact. 
     
     
         47 . The pin of  claim 46  wherein said plurality of lands are parallel to each other. 
     
     
         48 . The pin of  claim 46  wherein at least two of the lands are non-parallel to each other. 
     
     
         49 . The pin of  claim 39  wherein said longitudinal contact area is not smooth. 
     
     
         50 . The pin of  claim 39  wherein said longitudinal contact area includes notches therealong. 
     
     
         51 . The pin of  claim 39  wherein said longitudinal contact area is skewed along the top surface of the pin. 
     
     
         52 . The pin claim of  51  wherein the skew follows a generally diagonal path across the top surface of the pin. 
     
     
         53 . The method of  claim 2  further including the steps of slideably engaging the pin and terminal then they are brought together and skewing the longitudinal ridge placement on the pin to increase drag between the ridge and the terminal when brought together.

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