Power semiconductor device

Abstract

A power semiconductor device less prone to cause a reaction between a metal material for interconnection and an electrode or the like connected to a semiconductor region during the high-temperature operation thereof and less prone to be strained during the high-temperature operation thereof. The power semiconductor device can be an SiC power device or the like in which a first metal layer containing at least one selected from the group consisting of Pt, Ti, Mo, W and Ta is formed on a source electrode formed on the semiconductor region, such as a source region or the like. A second metal layer containing at least one selected from the group consisting of Mo, W and Cu is formed on the first metal layer. A third metal layer containing at least one selected from the group consisting of Pt, Mo and W is formed on the second metal layer.

1 . A power semiconductor device comprising:
 a semiconductor layer having a surface;   a semiconductor region of a predetermined conductivity type, said semiconductor region being formed in said semiconductor layer so as to be exposed at least at a portion of said surface of said semiconductor layer;   a first insulation film formed on said semiconductor region;   an electrode formed on said semiconductor region Or on said first insulation film;   a first metal layer formed on said electrode and containing at least one selected from the group consisting of Pt, Ti, Mo, W and Ta;   a second metal layer formed on said first metal layer and containing Cu;   a third metal layer formed on said second metal layer and containing at least one selected from the group consisting of Pt, Mo, W; and   a second insulation film formed in a region which is on said surface of said semiconductor layer and/or on a surface of said first insulation film and which is other than a region where said electrode is formed,   wherein said first metal layer functions to prevent said second metal layer from reacting with said second insulation film and said electrode during high-temperature operation.   
     
     
         2 . The power semiconductor device according to  claim 1 , wherein the first metal layer is single-layer film and has a thickness of 5 to 100 nm. 
     
     
         3 . The power semiconductor device according to  claim 1 , wherein the first metal layer has a multi-layer structure and has a thickness between 10 nm and 200 nm. 
     
     
         4 . The power semiconductor device according to  claim 1 , wherein the second metal layer has a thickness between 100 nm and 700 nm. 
     
     
         5 . The power semiconductor device according to  claim 1 , wherein the first metal layer is a multi-layer film in which a thin film having a thickness of 5 to 20 nm and containing Ti is used as a bottom-layer film in contact with the electrode. 
     
     
         6 . The power semiconductor device according to  claim 1 , wherein the first metal layer is an alloy film containing W. 
     
     
         7 . The power semiconductor device according to  claim 1 , wherein said second insulation layer is made of silicon oxide. 
     
     
         8 . The power semiconductor device according to  claim 1 , wherein said electrode is made of Ni-based metal.