Semiconductor devices and methods for manufacturing the same

Abstract

Semiconductor devices and methods of manufacturing semiconductor devices. A semiconductor device includes a metal gate electrode stacked on a semiconductor substrate with a gate insulation layer disposed therebetween, spacer structures disposed on the semiconductor substrate at both sides of the metal gate electrode, source/drain regions formed in the semiconductor substrate at the both sides of the metal gate electrode, and an etch stop pattern including a bottom portion covering the source/drain regions and a sidewall portion extended from the bottom portion to cover a portion of sidewalls of the spacer structures, in which an upper surface of the sidewall portion of the etch stop pattern is positioned under an upper surface of the metal gate electrode.

1 . A semiconductor device, comprising:
 a substrate;   a gate insulation layer on the substrate;   a metal gate electrode on the gate insulation layer;   a plurality of spacer structures on the substrate at sides of the metal gate electrode;   source/drain regions in the semiconductor substrate at the sides of the metal gate electrode; and   an etch stop pattern including a bottom portion covering the source/drain regions and a sidewall portion extending from the bottom portion to cover at least a part of sidewalls of the spacer structures, an upper surface of the sidewall portion being between the substrate and an upper surface of the metal gate electrode.   
     
     
         2 . The semiconductor device of  claim 1 , further comprising:
 a gap fill insulation layer covering the upper surface of the sidewall portion of the etch stop pattern.   
     
     
         3 . The semiconductor device of  claim 2 , wherein the gap fill insulation layer directly contacts a portion of the sidewalls of the spacer structures. 
     
     
         4 . The semiconductor device of  claim 2 , wherein:
 upper surfaces of the spacer structures are between the upper surface of the metal gate electrode and the substrate; and   the gap fill insulation layer covers the upper surfaces of the spacer structures.   
     
     
         5 . The semiconductor device of  claim 1 , further comprising:
 a contact plug connected to the source/drain regions, the contact plug penetrating and directly contacting the etch stop pattern.   
     
     
         6 . The semiconductor device of  claim 5 , wherein the etch stop pattern comprises a through hole between adjacent metal gate electrodes, a cross-sectional area of the through hole being substantially a same as a cross-sectional area of the contact plug. 
     
     
         7 . The semiconductor device of  claim 1 , wherein an overlap area between the etch stop pattern and the semiconductor substrate is greater than an overlap area between the spacer structure and the semiconductor substrate. 
     
     
         8 . The semiconductor device of  claim 1 , further comprising:
 a silicide layer between the source/drain regions and the etch stop pattern.   
     
     
         9 . The semiconductor device of  claim 1 , wherein the metal gate electrode comprises:
 a metal pattern including a metallic material, and   a barrier layer covering a lower surface and sides of the metal pattern.   
     
     
         10 . The semiconductor device of  claim 1 , wherein:
 the etch stop pattern and the spacer structures each include a hydrogenated silicon nitride layer, and   a hydrogen content of a material of the etch stop pattern is greater than a hydrogen content of a material of the spacer structures.   
     
     
         11 . The semiconductor device of  claim 1 , wherein the spacer structures comprise:
 a first spacer covering a sidewall of the metal gate electrode, and a second spacer covering a sidewall of the first spacer, and   an upper surface of the second spacer is between the upper surface of the metal gate and the substrate, and the upper surface of the sidewall portion of the etch stop pattern is between the upper surface of the second spacer and the substrate.   
     
     
         12 . The semiconductor device of  claim 1 , wherein the etch stop pattern, the first spacer and the second spacer each include a hydrogenated silicon nitride layer,
 a hydrogen content of a material of the etch stop pattern is greater than a hydrogen content of a material of the second spacer, and   the hydrogen content of the material of the second spacer is greater than a hydrogen content of a material of the first spacer.   
     
     
         13 . The semiconductor device of  claim 1 , wherein an upper surface of the source/drain regions protrudes above a surface of the substrate. 
     
     
         14 . The semiconductor device of  claim 13 , wherein a lower surface of the etch stop pattern is positioned between an upper surface of the gate insulation layer and the upper surface of the metal gate electrode. 
     
     
         15 .- 20 . (canceled) 
     
     
         21 . A semiconductor device, comprising:
 a first semiconductor layer;   a metal gate on the first semiconductor layer;   a plurality of spacer structures on sides of the metal gate; and   an etch stop layer on the first semiconductor layer and sidewalls of the spacer structures, a surface of the metal gate being a greater distance from the first semiconductor layer than the etch stop layer.   
     
     
         22 . The semiconductor device of  claim 21 , further comprising:
 an insulation layer on the etch stop layer, at least part of the insulation layer closer to the first semiconductor layer than the surface of the metal gate;   source/drain regions in the first semiconductor layer; and   a silicide layer between the etch stop layer and the source/drain regions.   
     
     
         23 . The semiconductor device of  claim 22 , further comprising:
 a second semiconductor layer in the source/drain regions, a semiconductor material of the second semiconductor layer different from a semiconductor material of the first semiconductor layer.   
     
     
         24 . The semiconductor device of  claim 22 , wherein:
 the spacer structures include first and second spacers; and   a hydrogen content of a material included in the etch stop pattern is greater than a hydrogen content of a material included in the first spacer and a hydrogen content of a material included in the second spacer.   
     
     
         25 . The semiconductor device of  claim 24 , wherein:
 the hydrogen content of the material included in the first spacer is less than the hydrogen content of material included in the second spacer; and   the first spacer is between the metal gate and the second spacer.   
     
     
         26 . The semiconductor device of  claim 25 , wherein each of the materials included in the first spacer, the second spacer and the etch stop layer includes a silicon nitride.