Semiconductor memory device and manufacturing method therefor

Abstract

First gate electrodes of memory cell transistors are formed in series with each other on a semiconductor substrate. A second gate electrode of a first selection transistor is formed adjacent to one end of the first electrodes. A third gate electrode of a second selection transistor is formed adjacent to the second electrode. A fourth gate electrode of a peripheral transistor is formed on the substrate. First, second, and third sidewall films are formed on side surfaces of the second, third, and fourth gate electrodes, respectively. A film thickness of the third sidewall film is larger than that of the first and second sidewall films. A space between the first electrode and the second electrode is larger than a space between the first electrodes, and a space between the second electrode and the third electrode is larger than a space between the first electrode and the second electrode.

1 - 7 . (canceled) 
     
     
         8 . A method of manufacturing a semiconductor memory device comprising:
 forming a plurality of first gate electrodes of a plurality of memory cell transistors, a second gate electrode of a first selection gate transistor, and a third gate electrode of a second selection gate transistor on a semiconductor substrate, the plurality of first gate electrodes being arranged at predetermined spaces in series with each other, the second gate electrode being arranged at one end of the plurality of first gate electrodes arranged in series with each other, and the third gate electrode being arranged adjacent to the second gate electrode;   covering the plurality of first gate electrodes, the second gate electrode, and the third gate electrode with a first insulating film, and forming the first insulating film on the semiconductor substrate;   forming a second insulating film on the first insulating film;   forming a mask material on the second insulating film to cover a gap between the first gate electrodes and to form a opening between the first gate electrode and the second gate electrode and between the second gate electrode and the third gate electrode;   after the mask material is formed, removing the second insulating films between the first gate electrode and the second gate electrode and between the second gate electrode and the third gate electrode;   after the mask material is removed, covering the plurality of first gate electrodes, the second gate electrode, and the third gate electrode with a third insulating film, and forming the third insulating film on the semiconductor substrate; and   etching the third insulating film by anisotropic etching to form sidewall insulating films on a side surface of the first gate electrode between the first gate electrode and the second gate electrode and on side surfaces of the second and third gate electrodes.   
     
     
         9 . The method of manufacturing a semiconductor memory device according to  claim 8 ,
 further comprising, after the plurality of first gate electrodes, the second gate electrode, and the third gate electrode are formed, forming first diffusion layers of a first conductivity type in the semiconductor substrate between the plurality of first gate electrodes, the semiconductor substrate between the first gate electrode and the second gate electrode, and the semiconductor substrate between the second gate electrode and the third gate electrode.   
     
     
         10 . The method of manufacturing a semiconductor memory device according to  claim 9 ,
 further comprising, after the first diffusion layers are formed, forming second diffusion layers of a second conductivity type in the semiconductor substrate under the first diffusion layers.   
     
     
         11 . The method of manufacturing a semiconductor memory device according to  claim 10 ,
 further comprising, after the mask material is formed, implanting impurity ions of the first conductivity type by ion implantation into the second diffusion layer between the first gate electrode and the second gate electrode and the second diffusion layer between the second gate electrode and the third gate electrode.   
     
     
         12 . The method of manufacturing a semiconductor memory device according to  claim 11 ,
 further comprising, after the mask material is formed, forming third diffusion layers of the second conductivity type at both ends of the second diffusion layer between the second gate electrode and the third gate electrode,   the third diffusion layers being formed by ion implantation in a direction inclined at a predetermined angle with respect to a direction vertical to a semiconductor substrate surface.   
     
     
         13 . A method of manufacturing a semiconductor memory device comprising:
 forming a plurality of first gate electrodes of a plurality of memory cell transistors, a second gate electrode of a first selection gate transistor, a third gate electrode of a second selection gate transistor, and a fourth gate electrode of a peripheral transistor on a semiconductor substrate, the plurality of first gate electrodes being arranged at predetermined spaces in series with each other, the second gate electrode being arranged at one end of the plurality of first gate electrodes arranged in series with each other, and the third gate electrode being arranged adjacent to the second gate electrode;   covering the plurality of first gate electrodes, the second gate electrode, the third gate electrode, and the fourth gate electrode with a first insulating film, and forming the first insulating film on the semiconductor substrate;   forming a second insulating film on the first insulating film;   forming a mask material on the second insulating film to cover a gap between the first gate electrodes and the fourth gate electrode and to form a opening between the first gate electrode and the second gate electrode and between the second gate electrode and the third gate electrode;   after the mask material is formed, removing the second insulating films between the first gate electrode and the second gate electrode and between the second gate electrode and the third gate electrode;   after the mask material is removed, covering the plurality of first gate electrodes, the second gate electrode, the third gate electrode, and the fourth gate electrode with a third insulating film, and forming the third insulating film on the semiconductor substrate; and   etching the third insulating film by anisotropic etching to form first sidewall insulating films on a side surface of the first gate electrode between the first gate electrode and the second gate electrode and on side surfaces of the second and the third gate electrodes and to form a second sidewall insulating film on a side surface of the fourth gate electrode.   
     
     
         14 . The method of manufacturing a semiconductor memory device according to  claim 13 ,
 further comprising, after the plurality of first gate electrode, the second gate electrode, the third gate electrode, and the fourth gate electrode are formed, forming first diffusion layers of a first conductivity type in the semiconductor substrate between the plurality of first gate electrodes, the semiconductor substrate between the first gate electrode and the second gate electrode, and the semiconductor substrate between the second gate electrode and the third gate electrode.   
     
     
         15 . The method of manufacturing a semiconductor memory device according to  claim 14 ,
 further comprising, after the first diffusion layers are formed, forming second diffusion layers of a second conductivity type in the semiconductor substrate under the first diffusion layers.   
     
     
         16 . The method of manufacturing a semiconductor memory device according to  claim 15 ,
 further comprising, after the mask material is formed, implanting impurity ions of the first conductivity type by ion implantation into the second diffusion layer between the first gate electrode and the second gate electrode and the second diffusion layer between the second gate electrode and the third gate electrode.   
     
     
         17 . The method of manufacturing a semiconductor memory device according to  claim 16 ,
 further comprising, after the mask material is formed, forming third diffusion layers of the second conductivity type at both ends of the second diffusion layer between the second gate electrode and the third gate electrode,   the third diffusion layers being formed by ion implantation in a direction inclined at a predetermined angle with respect to a direction vertical to a semiconductor substrate surface.