Semiconductor capacitor, one time programmable memory cell and fabricating method and operating method thereof

Abstract

A one time programmable memory cell having a gate, a gate dielectric layer, a source region, a drain region, a capacitor dielectric layer and a conductive plug is provided herein. The gate dielectric layer is disposed on a substrate. The gate is disposed on the gate dielectric layer. The source region and the drain region are disposed in the substrate at the sides of the gate, respectively. The capacitor dielectric layer is disposed on the source region. The capacitor dielectric layer is a resistive protection oxide layer or a self-aligned silicide block layer. The conductive plug is disposed on the capacitor dielectric layer. The conductive plug is served as a first electrode of a capacitor and the source region is served as a second electrode of the capacitor. The one time programmable memory (OTP) cell is programmed by making the capacitor dielectric layer breakdown.

1 . An operating method of a one time programmable memory cell, the one time programmable memory cell comprising a substrate of a first conductive type, a gate dielectric layer disposed on the substrate of the first conductive type, a gate disposed on the gate dielectric layer, a source region of a second conductive type and a drain region of the second conductive type disposed in the substrate of the first conductive type at the sides of the gate; a capacitor dielectric layer disposed on the source region of the second conductive type and a conductive plug disposed on the capacitor dielectric layer, wherein the capacitor dielectric layer is a resistive protection oxide layer or a self-aligned silicide block layer, the method comprises:
 programming the memory cell by making the capacitor dielectric layer breakdown.   
     
     
         2 . The operating method of a one time programmable memory cell according to  claim 1 , wherein the first conductive type is P type, the second conductive type is N type, the step of programming the memory cell comprises:
 applying a first voltage on the conductive plug, applying a second voltage on the substrate of the first conductive type; applying a third voltage on the drain region of the second conductive type, applying a fourth voltage on the gate, wherein the first voltage, the second voltage and the third voltage are set to make the capacitor dielectric layer breakdown, the fourth voltage is set to open a channel under the gate.   
     
     
         3 . The operating method of a one time programmable memory cell according to  claim 1 , wherein the substrate of the first conductive type comprises a well of a second conductive type and a well of the first conductive type being disposed on the well of the second conductive type, the first conductive type is P type, the second conductive type is N type, the step of programming the memory cell comprises:
 grounding the substrate of the first conductive type and the well of the second conductive type, applying a fifth voltage on the conductive plug, applying a sixth voltage on the gate, applying a seventh voltage on the drain region of the second conductive type, applying an eighth voltage on the well of the first conductive type, wherein the fifth, the seventh voltage and the eighth voltage are set to make the capacitor dielectric layer breakdown.   
     
     
         4 . The operating method of a one time programmable memory cell according to  claim 3 , wherein the fifth voltage is about 3.3 Volts, the sixth voltage is about 0 Volt, the seventh voltage is about −3.3 Volts, the eighth voltage is about −3.3 Volts. 
     
     
         5 . The operating method of a one time programmable memory cell according to  claim 1 , wherein the first conductive type is N type, the second conductive type is P type, the step of programming the memory cell comprises:
 applying a ninth voltage on the conductive plug, applying a tenth voltage on the substrate of the first conductive type and applying an eleventh voltage on the drain region of the second conductive type, applying a twelfth voltage on the gate, wherein the ninth, the tenth voltage and the eleventh voltage are set to make the capacitor dielectric layer breakdown, and the twelfth voltage is set to open a channel under the gate.   
     
     
         6 . The operating method of a one time programmable memory cell according to  claim 5 , wherein the ninth voltage is about −3.3 Volts, the tenth voltage is about 3.3 Volts, the eleventh voltage is about 3.3 Volts, the twelfth voltage is about 0 Volt. 
     
     
         7 . The operating method of a one time programmable memory cell according to  claim 1 , wherein the first conductive type is N type, the second conductive type is P type, the step of programming the memory cell comprises:
 applying a thirteenth voltage on the conductive plug, applying a fourteenth voltage on the substrate of the first conductive type, applying a fifteenth voltage on the gate, applying a sixteenth voltage on the drain region of the second conductive type, wherein the thirteenth voltage, the fourteenth voltage, and the sixteenth voltage are set to make the capacitor dielectric layer breakdown.   
     
     
         8 . The operating method of a one time programmable memory cell according to  claim 7 , wherein the thirteenth voltage is about 0 Volt, the fourteenth voltage is about 4 to 6 Volts, the fifteenth voltage is about 3.3 Volts, the sixteenth voltage is about 4 to 6 Volts.