US2012118383A1PendingUtilityA1

Autonomous Integrated Circuit

60
Assignee: BEDELL STEPHEN WPriority: Nov 15, 2010Filed: Nov 15, 2010Published: May 17, 2012
Est. expiryNov 15, 2030(~4.3 yrs left)· nominal 20-yr term from priority
H10F 77/935H10F 71/121H10F 71/103H10F 10/172H10F 10/166H10F 10/19H10F 10/17H10F 19/50Y02E10/548Y02E10/547Y02P70/50
60
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Claims

Abstract

An autonomous integrated circuit (IC) includes a solar cell formed on a bottom substrate of a silicon-on-insulator (SOI) substrate as a handle substrate; an insulating layer of the SOI substrate located on top of the solar cell; and a device layer formed on a top semiconductor layer of the SOI substrate located on top of the insulating layer, wherein a top contact of the device layer is electrically connected to a bottom contact of the solar cell such that the solar cell is enabled to power the device layer.

Claims

exact text as granted — not AI-modified
1 . A method for forming an autonomous integrated circuit (IC) on a silicon-on-insulator (SOI) substrate, the SOI substrate comprising a top semiconductor layer on top of an insulating layer on top of a bottom substrate, the method comprising:
 forming a solar cell on the bottom substrate of the SOI substrate as a handle substrate;   forming a device layer, the device layer comprising a top contact, on the top semiconductor layer; and   electrically connecting a bottom contact of the solar cell to the top contact of the device layer so as to enable the solar cell to power the device layer.   
     
     
         2 . The method of  claim 1 , wherein the top semiconductor layer and bottom substrate comprise silicon, and wherein the insulating layer comprises silicon oxide. 
     
     
         3 . The method of  claim 1 , further comprising forming a via through the insulating layer from the device layer to the solar cell. 
     
     
         4 . The method of  claim 1 , further comprising forming a protective layer on the solar cell before forming the device layer. 
     
     
         5 . The method of  claim 4 , wherein the protective layer comprises one of transparent conducting oxide and a nitride. 
     
     
         6 . The method of  claim 4 , further comprising forming the bottom contact of the solar cell on the protective layer. 
     
     
         7 . The method of  claim 4 , further comprising recessing the protective layer and forming the bottom contact of the solar cell on the solar cell. 
     
     
         8 . The method of  claim 4 , further comprising removing the protective layer after forming the device layer and performing additional solar cell processing before forming a second protective layer on the solar cell, forming a bottom contact to the solar cell, and electrically connecting the bottom contact of the solar cell to the top contact of the device layer. 
     
     
         9 . The method of  claim 1 , wherein the solar cell comprises one of a single junction solar cell, a single heterojunction solar cell, a multijunction solar cell, an interdigitated solar cell, and a tandem solar cell. 
     
     
         10 . The method of  claim 1 , wherein the device layer comprises a complementary metal-oxide-semiconductor (CMOS) device layer. 
     
     
         11 . The method of  claim 1 , wherein at least a portion of forming the solar cell using the bottom substrate of the SOI substrate as a handle substrate is performed before formation of the SOI substrate. 
     
     
         12 . The method of  claim 1 , further comprising gluing the device layer to the solar cell using a dielectric glue, wherein the dielectric glue comprises the insulating layer, to form the SOI substrate. 
     
     
         13 . An autonomous integrated circuit (IC), comprising;
 a solar cell formed on a bottom substrate of a silicon-on-insulator (SOI) substrate as a handle substrate;   an insulating layer of the SOI substrate located on top of the solar cell; and   a device layer formed on a top semiconductor layer of the SOI substrate located on top of the insulating layer, wherein a top contact of the device layer is electrically connected to a bottom contact of the solar cell such that the solar cell is enabled to power the device layer.   
     
     
         14 . The autonomous IC of  claim 13 , wherein the top semiconductor layer and bottom substrate comprise silicon, and wherein the insulating layer comprises silicon oxide. 
     
     
         15 . The autonomous IC of  claim 13 , further comprising a via located in the insulating layer connecting the device layer to the solar cell. 
     
     
         16 . The autonomous IC of  claim 13 , further comprising a protective layer located under the solar cell. 
     
     
         17 . The autonomous IC of  claim 16 , wherein the protective layer comprises one of transparent conducting oxide and a nitride. 
     
     
         18 . The autonomous IC of  claim 16 , wherein the bottom contact of the solar cell is formed on the protective layer. 
     
     
         19 . The autonomous IC of  claim 16 , wherein the bottom contact of the solar cell is formed in a recess in the protective layer and on the solar cell. 
     
     
         20 . The autonomous IC of  claim 13 , wherein the solar cell comprises one of a single junction solar cell, a single heterojunction solar cell, an interdigitated solar cell, and a tandem solar cell.

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