Method of manufacturing wafer level package

Abstract

A method of manufacturing a wafer level package including: separating chips by dicing a wafer; forming a removable resin layer in a space between the separated chips and at upper parts thereof; separating the chips by dicing the removable resin layer; mounting the chips separated in a state of being surrounded by the removable resin layer, on a carrier plate; forming a molding material on the carrier plate to cover the removable resin layer; separating the carrier plate from the chips; forming a dielectric layer having redistribution lines connected to the chips, on the chips exposed by separating the carrier plate; and forming a solder resist layer on the dielectric layer to expose portions of the redistribution lines.

1 . A method of manufacturing a wafer level package comprising:
 separating chips by dicing a wafer;   forming a removable resin layer in a space between the separated chips and at upper parts thereof;   separating the chips by dicing the removable resin layer;   mounting the chips separated in a state of being surrounded by the removable resin layer, on a carrier plate;   forming a molding material on the carrier plate to cover the removable resin layer;   separating the carrier plate from the chips;   forming a dielectric layer having redistribution lines connected to the chips, on the chips exposed by separating the carrier plate; and   forming a solder resist layer on the dielectric layer to expose portions of the redistribution lines.   
     
     
         2 . The method according to  claim 1 , between the separating the chips by dicing the wafer and the forming the removable resin layer in the space between the separated chips and at the upper parts thereof, further comprising rearranging the chips to be separated from one another by selecting only the chips determined as good through the chip failure test among the separated chips. 
     
     
         3 . The method according to  claim 1 , wherein in the mounting the chips separated in a state of being surrounded by the removable resin layer, only the chips determined as good through the chip failure test, among the chips separated in a state of being surrounded by the removable resin layer, are selected to be mounted on the carrier plate on which an adhesion layer is formed. 
     
     
         4 . The method according to  claim 1 , wherein the removable resin layer is made of KMPR. 
     
     
         5 . The method according to  claim 1 , wherein the forming the dielectric layer having the redistribution lines connected to the chips, on the chips exposed by separating the carrier plate includes:
 forming the dielectric layer on the chips exposed by separating the carrier plate;   forming via holes to expose portions of the chips by removing portions of the dielectric layer;   forming a seed layer on the dielectric layer including insides of the via holes;   forming a photoresist pattern on the seed layer to expose portions corresponding to the via holes;   forming the redistribution lines by plating metal on the seed layer exposed by the photoresist pattern;   removing the photoresist pattern; and   removing portions of the seed layer exposed by removing the photoresist pattern.   
     
     
         6 . The method according to  claim 1 , after the forming the solder resist layer on the dielectric layer to expose the portions of the redistribution lines, further comprising:
 forming UBMs on the redistribution lines exposed by the solder resist layer; and   forming solder balls on the UBMs.   
     
     
         7 . The method according to  claim 6 , after the forming the solder balls, further comprising separating the chips into individual packages by cutting along dicing lines between the chips. 
     
     
         8 . A method of reusing a chip comprising:
 manufacturing an individual package according to  claim 1 ;   separating a molding material from a chip by removing a removable resin layer surrounding the chip; and   removing a solder resist layer and a dielectric layer including redistribution lines on the chip.   
     
     
         9 . The method according to  claim 8 , wherein the removable resin layer is made of KMPR. 
     
     
         10 . The method according to  claim 8 , wherein in the separating the molding material from the chip by removing the removable resin layer surrounding the chip, the resin layer is removed by using N-Methyl Pyrrolidone (NMP). 
     
     
         11 . A method of reusing a chip comprising:
 manufacturing an individual package according to  claim 2 ;   separating a molding material from a chip by removing a removable resin layer surrounding the chip; and   removing a solder resist layer and a dielectric layer including redistribution lines on the chip.   
     
     
         12 . A method of reusing a chip comprising:
 manufacturing an individual package according to  claim 3 ;   separating a molding material from a chip by removing a removable resin layer surrounding the chip; and   removing a solder resist layer and a dielectric layer including redistribution lines on the chip.   
     
     
         13 . A method of reusing a chip comprising:
 manufacturing an individual package according to  claim 4 ;   separating a molding material from a chip by removing a removable resin layer surrounding the chip; and   removing a solder resist layer and a dielectric layer including redistribution lines on the chip.   
     
     
         14 . A method of reusing a chip comprising:
 manufacturing an individual package according to  claim 5 ;   separating a molding material from a chip by removing a removable resin layer surrounding the chip; and   removing a solder resist layer and a dielectric layer including redistribution lines on the chip.   
     
     
         15 . A method of reusing a chip comprising:
 manufacturing an individual package according to  claim 6 ;   separating a molding material from a chip by removing a removable resin layer surrounding the chip; and   removing a solder resist layer and a dielectric layer including redistribution lines on the chip.   
     
     
         16 . A method of reusing a chip comprising:
 manufacturing an individual package according to  claim 7 ;   separating a molding material from a chip by removing a removable resin layer surrounding the chip; and   removing a solder resist layer and a dielectric layer including redistribution lines on the chip.