US2012258590A1PendingUtilityA1
Chemical mechanical polishing (cmp) processing of through-silicon via (tsv) and contact plug simultaneously
Est. expiryMar 30, 2030(~3.7 yrs left)· nominal 20-yr term from priority
H10W 20/031H10W 20/0245H10W 20/2134H10W 20/40H10W 20/089H10W 20/023
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Claims
Abstract
A method includes forming conductive material in a contact hole and a TSV opening, and then performing one step to remove portions of the conductive material outside the contact hole and the TSV opening to leave the conductive material in the contact hole and the TSV opening, thereby forming a contact plug and a TSV structure, respectively. In some embodiments, the removing step is performed by a CMP process.
Claims
exact text as granted — not AI-modified1 . A method of forming a through-silicon via (TSV) structure, comprising:
forming a dielectric layer over a semiconductor substrate having a first region and a second region; forming a first opening in the dielectric layer in the first region; forming a second opening in the second region extending through the dielectric layer and a portion of the semiconductor substrate; forming a conductive material layer over the dielectric layer, filling the first opening and the second opening; removing portions of the conductive material layer positioned outside the first opening and the second opening to expose the dielectric layer, wherein a portion of the conductive material layer remaining in the second opening forms the TSV structure.
2 . The method of claim 1 , wherein said removing is performed by a chemical mechanical polishing (CMP) process.
3 . The method of claim 1 , wherein another portion of the conductive material layer remaining in the first opening forms a contact plug.
4 . The method of claim 1 , further comprising:
forming an integrated circuit (IC) component on the semiconductor substrate before forming the dielectric layer, wherein the step of forming a first opening in the dielectric layer exposes the IC component.
5 . The method of forming claim 1 , wherein the conductive material layer comprises at least one of tungsten or tungsten alloy.
6 . The method of claim 1 , wherein the conductive material layer comprises at least one of copper or copper alloy.
7 . The method of claim 1 , further comprising:
forming a passivation layer lining a sidewall portion and a bottom portion of the second opening before forming the conductive material layer.
8 . The method of claim 7 , wherein the passivation layer comprises oxide.
9 . The method of claim 1 , further comprising:
forming a barrier layer overlying the dielectric layer before forming the conductive material layer.
10 . The method of claim 9 , wherein the barrier layer comprises at least one of Ti, Ta, TiN, or TaN.
11 . A method of forming a through-silicon via (TSV) structure, comprising:
forming a dielectric layer over a semiconductor substrate having a first region and a second region; forming a first opening in the dielectric layer in the first region; forming a second opening in the second region extending through the dielectric layer and a portion of the semiconductor substrate; filling the first opening and the second opening with conductive material; simultaneously removing portions of the conductive material positioned outside the first opening and the second until the dielectric layer is exposed, wherein a portion of the conductive material remaining in the second opening forms the TSV structure.
12 . The method of claim 11 , wherein said removing is performed by a chemical mechanical polishing (CMP) process.
13 . The method of claim 11 , wherein another portion of the conductive material remaining in the first opening forms a contact plug.
14 . The method of claim 11 , further comprising:
forming an integrated circuit (IC) component on the semiconductor substrate before forming the dielectric layer, wherein the step of forming a first opening in the dielectric layer exposes the IC component.
15 . The method of forming claim 11 , wherein the conductive material comprises at least one of tungsten, tungsten alloy, copper or copper alloy.
16 . The method of claim 11 , further comprising:
forming a passivation layer lining a sidewall portion and a bottom portion of the second opening before filling the second opening with the conductive material.
17 . The method of claim 16 , wherein the passivation layer comprises oxide.
18 . The method of claim 11 , further comprising:
forming a barrier layer overlying the semiconductor substrate before filling the second opening with the conductive material
19 . The method of claim 18 , wherein the barrier layer comprises at least one of Ti, Ta, TiN, or TaN.
20 . A method of forming a through-silicon via (TSV) structure, comprising:
forming a dielectric layer over a semiconductor substrate having a first region and a second region; forming a first opening in the dielectric layer in the first region; forming a second opening in the second region extending through the dielectric layer and a portion of the semiconductor substrate; filling the first opening and the second opening with conductive material; removing portions of the conductive material positioned outside the first opening and the second by a single chemical mechanical polishing (CMP) process until the dielectric layer is exposed, wherein a portion of the conductive material remaining in the second opening forms the TSV structure.Cited by (0)
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