US2012261735A1PendingUtilityA1
Semiconductor device having a thin film capacitor and method for fabricating the same
Est. expiryJun 13, 2021(expired)· nominal 20-yr term from priority
H10P 14/69395H10P 14/69392H10P 14/6339H10P 14/69397H10D 1/716H10D 1/694H10D 1/692H10D 1/682H10D 1/68H10D 84/00C23C 16/405C23C 16/45525G11C 11/404G11C 2207/104H10B 12/00H10B 12/315H10B 12/033H10B 12/09
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Claims
Abstract
In a thin film transistor, each of an upper electrode and a lower electrode is formed of at least one material selected from the group consisting of a metal and a metal nitride, represented by TiN, Ti, W, WN, Pt, Ir, Ru. A capacitor dielectric film is formed of at least one material selected from the group consisting of ZrO.sub.2, HfO.sub.2, (Zr.sub.x, Hf.sub.1−x)O.sub.2 (0<x<1), (Zr.sub.y, Ti.sub.1−y)O.sub.2 (0<y<1), (Hf.sub.z, Ti.sub.1−z)O.sub.2 (0<z<1), (Zr.sub.k, Ti.sub.l, Hf.sub.m)O.sub.2 (0<k, l, m<1, k+l+m=1), by an atomic layer deposition process. The thin film transistor thus formed has a minimized leakage current and an increased capacitance.
Claims
exact text as granted — not AI-modified1 . A semiconductor device comprising a transistor having a gate electrode forming a word line in a DRAM, and source and drain regions; a bit line formed on a first interlayer insulating film overlying said transistor and connected through a bit line contact passing through said first interlayer insulating film to one of said source and drain regions of said transistor; and a capacitor connected through a capacitor contact to the other of said source and drain regions of said transistor, said capacitor being of a stacked three-dimensional MIM (metal-insulator-metal) structure and having a lower electrode lining a hole formed in a second interlayer insulator film overlying said first interlayer insulating film, a capacitor dielectric film formed on said lower electrode and an upper electrode formed on said capacitor dielectric film, said capacitor dielectric film and said upper electrode each extending into said hole in said second interlayer insulator film, said capacitor dielectric film comprising at least one dielectric material selected from the group consisting of ZrO 2 , HfO 2 , (Zr x , Hf 1-x )O 2 (0<x<1), (Zr y , Ti 1-y )O 2 (0<y<1), (Hf z , Ti 1-z ) O 2 (0<z<1), and (Zr k , Ti l , Hf m )O 2 (0<k, l, m<1, k+l+m=1), and said capacitor dielectric film having a film thickness of 5 to 15 nm.
2 . The device as claimed in claim 1 , wherein said lower electrode of said capacitor comprises at least one metal material selected from the group consisting of TiN, Ti, W, WN, Pt, Ir and Ru.
3 . The device as claimed in claim 1 , wherein said upper electrode of said capacitor comprises at least one metal material selected from the group consisting of TiN, Ti, W, WN, Pt, Ir and Ru.
4 . The device as claimed in claim 1 , wherein each of said upper and lower electrodes of said capacitor comprises at least one metal material selected from the group consisting of TiN, Ti, W, WN, Pt, Ir and Ru.
5 . The device as claimed in claim 2 , wherein said lower electrode of said capacitor comprises a TiN surface contacting said capacitor dielectric film.
6 . The device as claimed in claim 4 , wherein each of said lower and upper electrodes of said capacitor comprises a TiN surface contacting said capacitor dielectric film.
7 . The device as claimed in claim 2 , wherein said lower electrode of said capacitor comprises at least one of Ir and Ru.
8 . The device according to claim 1 , wherein said first interlayer insulating film contacts said transistor.
9 . The device according to claim 1 , further comprising a third interlayer insulating film covering said bit line and positioned between said first interlayer insulating film and said second interlayer insulating film, and wherein said capacitor contact passes through said third interlayer insulating film.
10 . The device according to claim 1 , wherein said capacitor dielectric film is formed by atomic layer deposition (ALD).
11 . The device according to claim 1 , wherein said capacitor dielectric film is annealed.
12 . The device as claimed in claim 1 , wherein a refractory metal silicide layer is formed on said source and drain regions of said transistor.
13 . The device as claimed in claim 12 , wherein said refractory metal silicide layer comprises cobalt silicide or nickel silicide.
14 . The device as claimed in claim 1 , wherein said bit line contact and said capacitor contact comprise a metal material.
15 . The device as claimed in claim 14 , wherein said bit line contact and said capacitor contact comprise tungsten.
16 . The device as claimed in claim 1 , wherein said dielectric material comprises ZrO 2 .
17 . The device as claimed in claim 1 , wherein said dielectric material comprises HfO 2 .
18 . The device as claimed in claim 5 , wherein said dielectric material comprises ZrO 2 .
19 . The device as claimed in claim 5 , wherein said dielectric material comprises HfO 2 .Cited by (0)
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