Formation of through-silicon via (tsv) in silicon substrate

Abstract

To form a through-silicon via (TSV) in a silicon substrate without using plating equipment or using sputtering equipment or small metal particles, and form an interlayer connection by stacking a plurality of such silicon substrates, a through hole of a silicon substrate is filled using molten solder itself. In detail, solid solder placed above the through hole of the silicon substrate is molten and the molten solder is guided to and filled in the internal space. A metal layer can be deposited on an internal surface of the through hole beforehand, and also an intermetallic compound (IMC) can be formed in a portion other than the metal layer.

1 . A method of forming a through-silicon via (TSV) in a through hole of a silicon substrate, the method comprising:
 blocking a lower end of the through hole of the silicon substrate, thereby keeping gas from flowing from the lower end of the through hole into an internal space of the through hole;   placing solid solder above the through hole of the silicon substrate for subsequently filling in the through hole;   evacuating a space that includes both the internal space and an external space of the through hole;   melting the placed solid solder to block an upper end of the through hole of the silicon substrate by the molten solder, thereby keeping gas from flowing from the upper end of the through hole into the internal space of the through hole; and   changing an evacuated state back to a previous state to cause a pressure difference between the external space and the internal space of the through hole so that the molten solder is guided to the internal space of the through hole and the internal space of the through hole is filled with the molten solder.   
     
     
         2 . The method according to  claim 1 , further comprising:
 depositing a metal layer on an internal surface of the through hole.   
     
     
         3 . The method of  claim 2 , wherein the metal layer is a thin film of Au. 
     
     
         4 . The method of  claim 2 , wherein the metal layer is a thin film of Cu. 
     
     
         5 . The method according to  claim 2 , wherein a thickness of the metal layer that is deposited on the internal surface of the through hole is a specified thickness at which substantial electric conduction occurs. 
     
     
         6 . The method according to  claim 5 , wherein the thickness of the metal layer is in a range of 0.64 μm to 0.84 μm, and ranges therebetween, a diameter of the through hole is 50 μm or less, and a depth of the through hole is 400 μm or less. 
     
     
         7 . The method according to  claim 2 , further comprising:
 forming an intermetallic compound (IMC) in a portion other than the metal layer in the filled internal space of the through hole.   
     
     
         8 . The method according to  claim 7 , further comprising:
 adding a fine powder of metal which is Cu into the through hole before the step of melting.   
     
     
         9 . The method according to  claim 8 , wherein the metal layer has a thickness in a range of 1 μm to 9 μm, and ranges therebetween. 
     
     
         8 - 10 . (canceled) 
     
     
         11 . A method of joining a plurality of silicon substrates which are each the silicon substrate according to  claim 8 , the method comprising:
 providing a plurality of solder bumps on a first silicon substrate;   providing a second silicon substrate on the plurality of solder bumps; and   melting the solder bumps by generating a specific temperature higher than a melting temperature of the placed solid solder.