Semiconductor device and manufacturing method of the same
Abstract
The reliability of a semiconductor device having an embedded wire in the lowest layer wire is improved. In a main surface of a semiconductor substrate, MISFETs are formed. Over the main surface, insulating films 10, 11 are formed. In the insulating films 10, 11 a contact hole is formed and a plug is embedded therein. Over the insulating film 11 , insulating films 14, 15, 16 are formed. An opening is formed in those insulating films and a wire is embedded therein. The insulating film 15 is an etching stopper film when etching the insulating film 16 to form the opening. The insulating film 11 has a high hygroscopicity and the insulating film 15 has a low moisture resistance. By interposing the insulating film 14 therebetween with a higher density of Si (silicon) atoms than the insulating film 11 , an electrically weak interface is prevented from being formed.
Claims
exact text as granted — not AI-modified1 - 25 . (canceled)
26 . A manufacturing method of a semiconductor device comprising the steps of:
(a) preparing a semiconductor substrate; (b) forming a semiconductor element in the main surface of the semiconductor substrate; (c) forming a first insulating film containing silicon and oxygen over the main surface in which the semiconductor element of the semiconductor substrate is formed; (d) forming a first opening in the first insulating film; (e) forming a first conductor part embedded in the first opening; (f) forming a second insulating film containing silicon and oxygen, the second insulating film having portions formed directly on and in direct contact with an upper surface of the first insulating film; (g) forming a third insulating film containing silicon and carbon over the second insulating film; (h) forming a fourth insulating film containing silicon and oxygen over the third insulating film; (i) forming a wire opening in the fourth insulating film by etching the fourth insulating film; (j) exposing at least part of the top surface of the first conductor part at the bottom of the wire opening by etching the third insulating film and the second insulating film at the bottom of the wire opening; and (k) forming a first wire embedded in the wire opening and electrically coupled with the first conductor part, at least part of a lower surface of the first wire being in direct contact with the upper surface of the first insulating film, wherein the second insulating film is a film with a higher density of the number of Si atoms than that of the first insulating film, and wherein the third insulating film is a SiCN film.
27 . The manufacturing method of a semiconductor device according to claim 26 ,
wherein in the (i) step, a wire opening is formed in the fourth insulating film by etching the fourth insulating film using the third insulating film as an etching stopper.
28 . The manufacturing method of a semiconductor device according to claim 27 ,
wherein in the (c) step, the first insulating film is formed using the thermal CVD method or coating method, and wherein in the (f) step, the second insulating film is formed using the plasma CVD method.
29 . The manufacturing method of a semiconductor device according to claim 28 ,
wherein the first insulating film is an O 3 -TEOS oxide film or an SOG film, wherein the second insulating film is a silicon oxide film or a silicon oxynitride film, and wherein the fourth insulating film is a silicon oxide film, a silicon oxynitride film, or an insulating film with a lower dielectric constant than that of a silicon oxide film.
30 . The manufacturing method of a semiconductor device according to claim 28 ,
wherein a first wire is a wire layer in a lowest layer among wire layers formed over the semiconductor substrate.
31 . The manufacturing method of a semiconductor device according to claim 28 ,
wherein a surface of the first insulating film formed in the (c) step is not flat, wherein after the (c) step and before the (d) step, the method further comprises the steps of
(c1) forming a sixth insulating film over the first insulating film; and
(c2) flattening a top surface of a first laminated film including the first and sixth insulating films by polishing and partially exposing the first insulating film in the top surface of the flattened first laminated film,
wherein in the (d) step, the first opening is formed in the first laminated film, and wherein in the (f) step, the second insulating film is formed over the first laminated film in which the first conductor part is embedded.
32 . The manufacturing method of a semiconductor device according to claim 31 ,
wherein in the (d) step, the first opening is formed at a position that overlaps with the part of the top surface of the first laminated film where the first insulating film is exposed.Cited by (0)
No later patents cite this yet.
References (0)
No backward citations on record.