Method of joining a chip on a substrate

Abstract

A method and apparatus for making chip assemblies is disclosed that prevent or reduce the cracking and delamination of ultra low-k dielectrics in the back-end-of-line in Si chips that can occur during the chip assembly process. The method and apparatus apply pressure to the top and bottom surfaces of a substrate during the chip bonding process so that the bending and warping of the assembled modules are reduced. The reduced bending and warping prevent or reduce the cracking and delamination of ultra low-k dielectrics.

1 . A chip assembly apparatus, comprising:
 a carrier, said carrier including a top surface that is generally planar for supporting a substrate and at least one aperture for receiving a fastener therein;   a cover having a first surface for contacting the top surface of the carrier, a second surface for contacting at least a portion of the top surface of the substrate, a third surface extending between the first surface and the second surface, and at least one aperture for receiving a fastener therein; and   at least one fastener for securing the cover to the carrier,   wherein the at least one fastener secures the cover to the carrier so that the cover and the carrier apply pressure to at least a portion of the bottom surface and at least a portion of the top surface of the substrate.   
     
     
         2 . The apparatus of  claim 1 , wherein the pressure that the cover and the carrier apply to the substrate can be varied by adjusting the force with which the at least one fastener secures the cover to the carrier. 
     
     
         3 . The apparatus of  claim 1 , wherein the third surface provides a mechanical standoff to limit the amount of pressure that the cover and the carrier apply to the substrate when the cover is secured to the carrier. 
     
     
         4 . The apparatus of  claim 1 , wherein the at least one fastener includes a screw, a clip, or a pin. 
     
     
         5 . The apparatus of  claim 1 , wherein the third surface is positioned a sufficient distance from a lateral edge of the substrate to permit lateral expansion. 
     
     
         6 . The apparatus of  claim 1 , wherein the third surface has a length that is approximately equal to a thickness of the substrate. 
     
     
         7 . The apparatus of  claim 1 , wherein the pressure applied by the cover and the carrier to the substrate oppose bending and warping of the substrate but permit lateral expansion of the substrate. 
     
     
         8 . The apparatus of  claim 1 , wherein the cover comprises an opening that permits a chip to be placed on the substrate. 
     
     
         9 . The apparatus of  claim 1 , wherein the cover comprises a plurality of openings that permit a chip to be placed on more than one substrate. 
     
     
         10 . An apparatus for assembling more than one chip assembly, comprising:
 a carrier, said carrier including a top surface that is generally planar for supporting more than one substrate and at least one aperture for receiving a fastener therein;   a cover having a first surface for contacting the top surface of the carrier, a second surface for contacting at least a portion of the top surface of the substrate, a third surface extending between the first surface and the second surface, and at least one aperture for receiving a fastener therein; and   at least one fastener for securing the cover to the carrier,   wherein the carrier and the cover cooperate to apply pressure to at least a portion of the bottom surface and at least a portion of the top surface of each of the substrates when the cover is secured to the carrier by the at least one fastener.   
     
     
         11 . The apparatus of  claim 10 , wherein the cover includes a plurality of openings that permit a chip to be placed on each of the more than one substrates.