Metal-Semiconductor Intermixed Regions
Abstract
In one exemplary embodiment, a program storage device readable by a machine, tangibly embodying a program of instructions executable by the machine for performing operations, said operations including: depositing a first layer having a first metal on a surface of a semiconductor structure, where depositing the first layer creates a first intermix region at an interface of the first layer and the semiconductor structure; removing a portion of the deposited first layer to expose the first intermix region; depositing a second layer having a second metal on the first intermix region, where depositing the second layer creates a second intermix region at an interface of the second layer and the first intermix region; removing a portion of the deposited second layer to expose the second intermix region; and performing at least one anneal on the semiconductor structure.
Claims
exact text as granted — not AI-modified1 - 18 . (canceled)
19 . A method comprising:
depositing, using ionized physical vapor deposition, a layer comprised of a metal on a surface of a semiconductor structure, where depositing the layer creates an intermix region at an interface of the layer and the semiconductor structure, where depositing the layer comprises controlling an energy of incident atoms in order to achieve a desired characteristic of the intermix region; and removing a portion of the deposited layer to expose the intermix region.
20 . The method of claim 19 , where the desired characteristic comprises a desired thickness, where controlling the energy of the incident atoms comprises controlling an electric field in the trajectory of the incident atoms, the method further comprising performing at least one anneal on the semiconductor structure.
21 . The method of claim 19 , where the metal comprises at least one of Co, Ti, Pt, Ni, Er, Yb and W.
22 . The method of claim 19 , where the metal is a first metal, the intermix region is a first intermix region and the layer is a first layer, where the removed portion of the deposited first layer comprises non-intermixed first metal, the method further comprising:
depositing a second layer comprised of a second metal on the first intermix region, where depositing the second layer creates a second intermix region at an interface of the second layer and the first intermix region; removing a portion of the deposited second layer to expose the second intermix region, where the removed portion of the deposited second layer comprises non-intermixed second metal; and performing at least one anneal on the semiconductor structure, where no anneal is performed prior to removal of the portion of the deposited second layer.
23 . The method of claim 22 , where the first metal is the same as the second metal.
24 . The method of claim 22 , where the first metal is different from the second metal.
25 . The method of claim 22 , further comprising: depositing a third layer comprised of a third metal on the second intermix region, where depositing the third layer creates a third intermix region at an interface of the third layer and the second intermix region.
26 . The method of claim 22 , where performing the at least one anneal on the semiconductor structure consists of performing only one anneal on the semiconductor structure.
27 . The method of claim 22 , where the first metal is the same as the second metal and where the first metal comprises at least one of Co, Ti, Pt, Ni, Er, Yb and W.
28 . The method of claim 22 , where depositing the second layer comprises using ionized physical vapor deposition and controlling an energy of incident atoms in order to achieve a second desired characteristic of the second intermix region.
29 . The method of claim 28 , where the second desired characteristic comprises a second desired thickness, where controlling the energy of the incident atoms for the second layer comprises controlling an electric field in the trajectory of the incident atoms.Cited by (0)
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