Apparatus for three-dimensional integrated circuit device fabrication including wafer scale membrane

Abstract

Apparatus configured for the fabrication of three-dimensional integrated devices and three-dimensional integrated devices fabricated therefrom are described. A device side of a donor wafer is coated with a polymer film and exposure of a substrate side to an oxidizing plasma creates a continuous SiO 2 film. Portions of the substrate side are selectively coated with a polymer film and etching of uncoated areas removes at least a substantial portion of the crystalline substrate. A plasma etch tool etches a crystalline substrate to within a pre-determined thickness. The silicon portions of the substrate side are etched by exposure to TMAH. After etching, the donor semiconductor wafer is supported by portions of the substrate that were not etched. The supporting structure allows flexing of the donor semiconductor wafer within the etched areas to enable conformality and reliable bonding to the device surfaces of an acceptor wafer to form a three dimensional integrated device.

1 . A three-dimensional integrated circuit fabrication apparatus, comprising:
 an etching tool adapted to etch crystalline substrate within an area of a substrate side of a donor semiconductor wafer, the substrate side having a substrate thickness and being located opposite a device side of the donor semiconductor wafer, to remove at least a substantial portion of the crystalline substrate within the area; and   a supporting structure adapted to support the donor semiconductor wafer, the supporting structure allowing flexing of the donor semiconductor wafer within at least a portion of the area after the etching.   
     
     
         2 . The three-dimensional integrated circuit fabrication apparatus of  claim 1 , wherein the area comprises an entire side of the substrate side, and wherein the supporting structure comprises one of a separate supporting structure attached to the donor semiconductor wafer and portions of the substrate side that are outside of the area and that are not etched by the etching. 
     
     
         3 . The three-dimensional integrated circuit fabrication apparatus of  claim 1 , further comprising:
 a wafer preparation tool that is further adapted to:
 coat the device side of the donor semiconductor wafer with a first polymer film that is resistant to etching chemistries; 
 define the area by coating portions of the substrate side outside the area with donor polymer film that is resistant to etching chemistries, 
   wherein the etching tool is further adapted to:
 expose the substrate side to an oxidizing plasma to create a continuous native silicon dioxide film on a surface of the substrate side that is opposite the device side; 
 etch the substrate side with a plasma etch tool to substantially thin the crystalline substrate to within a pre-determined thickness; and 
 expose the substrate side to TMAH to etch silicon portions of the substrate side and not etch silicon dioxide portions of the substrate side; and 
   wherein the supporting structure comprises portions of the substrate side that are outside of the area and that are not etched by the etching.   
     
     
         4 . The three-dimensional integrated circuit fabrication apparatus of  claim 1 , further comprising:
 a wafer bonding apparatus adapted to bond at least a portion of the device side of the donor semiconductor wafer to a device side of an acceptor semiconductor wafer such that the flexing of the donor semiconductor wafer conforms the device side of the donor semiconductor wafer to the device side of the acceptor semiconductor wafer.   
     
     
         5 . The three-dimensional integrated circuit fabrication apparatus of  claim 4 , wherein the supporting structure comprises a plurality of additional support partitions that form a grid structure defining a plurality of cavities, the grid structure being aligned with edges of die across the donor semiconductor wafer and each cavity within the plurality of cavities circumscribing at least one die on the donor semiconductor structure,
 the three-dimensional integrated circuit fabrication apparatus further comprising:
 a wafer positioner adapted to position, after the etching and the supporting, the device side of the donor semiconductor wafer in proximity to and removed from the device side of the acceptor semiconductor wafer, the positioning causing the at least one die on the donor semiconductor wafer to be aligned with a corresponding at least one die on the acceptor wafer, and 
   wherein the wafer bonding apparatus is further adapted to adjust an internal pressure within one cavity of the plurality of cavities to urge at least one die circumscribed by the one cavity into contact with the device side of the acceptor semiconductor wafer.   
     
     
         6 . The three-dimensional integrated circuit fabrication apparatus of  claim 4 , wherein the etching tool is further adapted to etch the crystalline substrate so as to allow light to pass through a remainder of the donor semiconductor wafer,
 three-dimensional integrated circuit fabrication apparatus further comprising:   a wafer positioner adapted to position the device side of the donor semiconductor wafer in proximity to and removed from the device side of the acceptor semiconductor wafer, the positioning causing at least one die on the donor semiconductor wafer to be aligned with a corresponding at least one die on the acceptor wafer, wherein the wafer positioner further comprises an optical sensor adapted to sense a position of the acceptor semiconductor wafer relative to the donor semiconductor wafer, and   wherein the wafer bonding apparatus is further adapted to adjust an internal pressure on a backside of the donor semiconductor wafer to urge the device side of the donor semiconductor wafer into contact with the device side of the acceptor semiconductor wafer, wherein the backside is opposite the device side of the donor wafer.   
     
     
         7 . A donor wafer containing at least one integrated semiconductor device, the donor wafer comprising:
 a donor wafer membrane comprising a device layer and a buried insulating layer, the donor wafer being formed by substantially removing a crystalline substrate from an area of a donor wafer, thereby allowing the device layer and the buried insulating layer within the area to flexibly conform to an acceptor surface for bonding; and   a support structure attached to regions of the donor wafer membrane that are outside of the area of the donor wafer membrane.