Inventor · disambiguated record
James Vichiconti
Also filed as: VICHICONTI JAMES
14 granted patents·6 pending applications·58 citations·filing 1998–2016
90Inventor score
Files withIBM8ENGELMANN SEBASTIAN ULRICH3LA TULIPE JR DOUGLAS C3HOVEL HAROLD J2CALLEGARI ALESSANDRO C1
Top patents by PatentIndex Score
20 records- 0190US9431487B2Graphene layer transferIBM·Filed 2013·Granted Aug 30, 2016·9 cites·15 claims
- 0278US8878259B2Super lattice/quantum well nanowiresHOVEL HAROLD J·Filed 2012·Granted Nov 4, 2014·3 cites·24 claims
- 0378US7935612B1Layer transfer using boron-doped SiGe layerIBM·Filed 2010·Granted May 3, 2011·4 cites·20 claims
- 0476US7528056B2Low-cost strained SOI substrate for high-performance CMOS technologyIBM·Filed 2007·Granted May 5, 2009·5 cites·16 claims
- 0575US8440494B2Single-crystalline silicon alkaline texturing with glycerol or ethylene glycol additivesFISHER KATHRYN C·Filed 2011·Granted May 14, 2013·1 cites·23 claims
- 0672US8273591B2Super lattice/quantum well nanowiresHOVEL HAROLD J·Filed 2008·Granted Sep 25, 2012·3 cites·13 claims
- 0768US8232171B2Structure with isotropic silicon recess profile in nanoscale dimensionsENGELMANN SEBASTIAN ULRICH·Filed 2009·Granted Jul 31, 2012·2 cites·9 claims
- 0858US6928380B2Thermal measurements of electronic devices during operationIBM·Filed 2003·Granted Aug 9, 2005·8 cites·21 claims
- 0956US9412620B2Three-dimensional integrated circuit device fabrication including wafer scale membraneGLOBALFOUNDRIES US 2 LLC·Filed 2015·Granted Aug 9, 2016·0 cites·14 claims
- 1056US8963278B2Three-dimensional integrated circuit device using a wafer scale membraneIBM·Filed 2013·Granted Feb 24, 2015·0 cites·7 claims
- 1153US9859379B2Graphene layer transferIBM·Filed 2016·Granted Jan 2, 2018·0 cites·19 claims
- 1252US8637953B2Wafer scale membrane for three-dimensional integrated circuit device fabricationLA TULIPE JR DOUGLAS C·Filed 2008·Granted Jan 28, 2014·0 cites·5 claims
- 1352US2012299145A1Apparatus for three-dimensional integrated circuit device fabrication including wafer scale membraneLA TULIPE JR DOUGLAS C·Filed 2012·Application pending·0 cites
- 1452US2012302040A1Method of fabrication of a three-dimensional integrated circuit device using a wafer scale membraneLA TULIPE JR DOUGLAS C·Filed 2012·Application pending·0 cites
- 1550US6209575B1Tamper proof set screwIBM·Filed 1998·Granted Apr 3, 2001·23 cites·5 claims
- 1648US2012193680A1Structure with isotropic silicon recess profile in nanoscale dimensionsENGELMANN SEBASTIAN ULRICH·Filed 2012·Application pending·0 cites
- 1748US2012193715A1Structure with isotropic silicon recess profile in nanoscale dimensionsENGELMANN SEBASTIAN ULRICH·Filed 2012·Application pending·0 cites
- 1847US8081280B2Method of producing UV stable liquid crystal alignmentCHIU GEORGE LIANG-TAI·Filed 2007·Granted Dec 20, 2011·0 cites·22 claims
- 1943US2011272287A1Method for patterning magnetic filmsIBM·Filed 2010·Application pending·0 cites
- 2038US2007224365A1High pretilt homogeneous alignment and tilted vertical alignment by surface modification of thin films with nitrogen ion beamCALLEGARI ALESSANDRO C·Filed 2006·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →