Method for Stacking Devices and Structure Thereof

Abstract

A semiconductor device that has a first device that includes a first through-silicon via (TSV) structure, a first coating material disposed over the first device, the first coating material continuously extending over the first device and covering the first TSV structure, a second device disposed over the first device and within the first coating material, the second device includes a second TSV structure and a plurality of conductive bumps, the plurality of conductive bumps are positioned within the first coating material, a second coating material disposed over the second device, the second coating material continuously extends over the second device and covers the second TSV structure, and a third device disposed over the second coating material, the third device includes a third TSV structure.

We claim: 
     
         1 . A semiconductor device comprising:
 a first device including a first plurality of conductive bumps;   a second device including a second plurality of conductive bumps, the second device overlying the first device and electrically coupled to the first device;   a third device including a third plurality of conductive bumps, the third device overlying the second device and electrically coupled to the second device;   a first coating material disposed between the first and second devices, wherein the first coating material continuously covers a surface area between and surrounding the second plurality of conductive bumps, and wherein a wall of the first coating material is in direct contact with a wall of the second plurality of conductive bumps; and   a second coating material disposed between the second and third devices, wherein the second coating material continuously covers a surface area between and surrounding the third plurality of conductive bumps, and wherein a wall of the second coating material is in direct contact with a wall of the third plurality of conductive bumps.   
     
     
         2 . The semiconductor device of  claim 1 , wherein the first and second coating materials are configured with substantially similar defect characteristics. 
     
     
         3 . The semiconductor device of  claim 1 , wherein the first, second, and third devices are each dies. 
     
     
         4 . The semiconductor device of  claim 3 , further comprising a fourth device including a fourth plurality of conductive bumps, the fourth device overlying the third device and electrically coupled to third device, the fourth device being a die; and
 a third coating material disposed between the third and fourth devices, the third coating material being configured with substantially similar defect characteristics as that of the first and second coating materials,   wherein the third coating material continuously covers a surface area between and surrounding the fourth plurality of conductive bumps, and   wherein a wall of the third coating material is in direct contact with a wall of the fourth plurality of conductive bumps.   
     
     
         5 . The semiconductor device of  claim 1 , wherein the first, second, and third devices each include a plurality of through silicon via (TSV) structures. 
     
     
         6 . The semiconductor device of  claim 5 , wherein one of the TSV structures of the first device is electrically coupled to one of the TSV structures of the second device, and wherein one of the TSV structures of the second device is electrically coupled to one of the TSV structures of the third device. 
     
     
         7 . The semiconductor device of  claim 1 , wherein the second and third plurality of conductive bumps connect the first, second, and third devices. 
     
     
         8 . The semiconductor device of  claim 1 , further comprising:
 a carrier substrate; and   wherein the first device overlies the carrier substrate and is secured to the carrier substrate.   
     
     
         9 . A semiconductor device comprising:
 a first device having a first through-silicon via (TSV) structure;   a first coating material disposed over the first device, wherein the first coating material continuously extends over the first device and covers the first TSV structure;   a second device disposed over the first device and within the first coating material, wherein the second device includes a second TSV structure and a plurality of conductive bumps, wherein the plurality of conductive bumps are positioned within the first coating material;   a second coating material disposed over the second device, wherein the second coating material continuously extends over the second device and covers the second TSV structure; and   a third device disposed over the second coating material, wherein the third device includes a third TSV structure.   
     
     
         10 . The semiconductor device of  claim 9 , wherein the first coating material includes a polymer component and a flux component. 
     
     
         11 . The semiconductor device of  claim 9 , wherein the first coating material and the second coating material are substantially similar. 
     
     
         12 . The semiconductor device of  claim 9 , wherein at least one of the conductive bumps from the plurality of conductive bumps contacts the first TSV structure. 
     
     
         13 . The semiconductor device of  claim 9 , wherein the first, second, and third devices each include a circuit; and
 wherein the circuits of the first, second, and third devices are electrically coupled using the first and second TSV structures.   
     
     
         14 . The semiconductor device of  claim 9 , wherein the first, second, and third devices are chips. 
     
     
         15 . A semiconductor device comprising:
 a first device having a first through-silicon via (TSV) structure;   a first coating material disposed over the first device, the first coating material extending over the first device and covering the first TSV structure;   a second device disposed on the first coating material, the second device having a second TSV structure and a plurality of conductive bumps, wherein the plurality of conductive bumps are disposed within the first coating material;   a second coating material disposed over the second device, the second coating material extending over the second device and covering the second TSV structure; and   a third device disposed on the second coating material.   
     
     
         16 . The semiconductor device of  claim 15 , wherein the first TSV structure is exposed on a side of the first device. 
     
     
         17 . The semiconductor device of  claim 15 , wherein the second device further includes a bonding pad, wherein the bonding pad is electrically coupled to the second TSV structure. 
     
     
         18 . The semiconductor device of  claim 15 , wherein the first coating material includes a B-stage polymer. 
     
     
         19 . The semiconductor device of  claim 15 , wherein the first coating material continuously extends over the first device and the second coating material continuously extends over the second device. 
     
     
         20 . The semiconductor device of  claim 15 , wherein the first, second, and third devices are one of a circuit and a die, and
 wherein the first, second, and third devices are electrically coupled together.