US2013175661A1PendingUtilityA1

Integrated Circuit Having Back Gating, Improved Isolation And Reduced Well Resistance And Method To Fabricate Same

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Assignee: CAI JINPriority: Jan 5, 2012Filed: Sep 20, 2012Published: Jul 11, 2013
Est. expiryJan 5, 2032(~5.5 yrs left)· nominal 20-yr term from priority
H10W 10/181H10W 10/0145H10W 10/061H10W 10/17H10W 10/014H10P 90/1906H10W 10/20H10W 10/021H10D 86/201H10D 86/01H10D 62/115
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Claims

Abstract

A structure includes a silicon substrate; at least two wells in the silicon substrate; and a deep trench isolation (DTI) separating the two wells. The DTI has a top portion and a bottom portion having a width that is larger than a width of the top portion. The structure further includes at least two semiconductor devices disposed over one of the wells, where the at least two semiconductor devices are separated by a shallow trench isolation (STI). In the structure sidewalls of the top portion of the DTI and sidewalls of the STI are comprised of doped, re-crystallized silicon. The doped, re-crystallized silicon can be formed by an angled ion implant that uses, for example, one of Xe, In, BF 2 , B 18 H 22 , C 16 H 10 , Si, Ge or As as an implant species to amorphize the silicon, and by annealing the amorphized silicon to re-crystallize the amorphized silicon.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A structure comprising:
 a silicon substrate;   at least two wells in the silicon substrate;   a deep trench isolation (DTI) separating said two wells, the DTI having a top portion and a bottom portion having a width that is larger than a width of the top portion; and   at least two semiconductor devices disposed over one of the wells, the at least two semiconductor devices being separated by a shallow trench isolation (STI);   where sidewalls of the top portion of the DTI and sidewalls of the STI are comprised of doped, re-crystallized silicon.   
     
     
         2 . The structure of  claim 1 , where the silicon substrate is disposed beneath a buried oxide layer that in turn is disposed beneath a semiconductor layer. 
     
     
         3 . The structure of  claim 1 , where the silicon substrate is a bulk silicon substrate. 
     
     
         4 . The structure of  claim 1 , where one of the wells is an N-type well and one of the wells is a P-type well. 
     
     
         5 . The structure of  claim 1 , where the doped, re-crystallized silicon is formed by an angled ion implant that uses one of Xe, In, BF 2 , B 18 H 22 , C 16 H 10 , Si, Ge or As as an implant species to amorphize the silicon, and by annealing the amorphized silicon to re-crystallize the amorphized silicon. 
     
     
         6 . The structure of  claim 5 , where the angled ion implant uses Xe as an implant species and is performed with about a 10 KeV implant energy and about a 3×10 14  atoms/cm 2  dose. 
     
     
         7 . The structure of  claim 1 , where the bottom portion of the DTI contains a void within insulator material that fills the bottom portion.

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