US2013189839A1PendingUtilityA1

Method to form silicide contact in trenches

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Assignee: GUILLORN MICHAEL APriority: Jan 23, 2012Filed: Sep 13, 2012Published: Jul 25, 2013
Est. expiryJan 23, 2032(~5.5 yrs left)· nominal 20-yr term from priority
H10W 20/047H10W 20/40H10W 20/035H10D 64/0112H10D 30/0323H10D 84/0186H10D 84/038H10D 84/017H10D 64/258H10D 64/251H10D 30/6743H10D 30/6737H10D 30/6729H10D 30/6715H10D 30/0227
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Claims

Abstract

A method for forming silicide contacts includes forming a dielectric layer on a gate spacer, a gate stack, and a first semiconductor layer. The first semiconductor layer comprises source/drain regions. Contact trenches are formed in the dielectric layer so as to expose at least a portion of the source/drain regions. A second semiconductor layer is formed within the contact trenches. A metallic layer is formed on the second semiconductor layer. An anneal is performed to form a silicide region between the second semiconductor layer and the metallic layer. A conductive contact layer is formed on the metallic layer or the silicide region.

Claims

exact text as granted — not AI-modified
1 . A method for forming silicide contacts, the method comprising:
 forming a dielectric layer on a gate spacer, a gate stack, and a first semiconductor layer comprising source/drain regions;   forming contact trenches in the dielectric layer, wherein the contact trenches expose at least a portion of the source/drain regions;   forming a second semiconductor layer within the contact trenches, wherein a bottom portion of the second semiconductor layer is formed on exposed portions of the source/drain regions, and wherein the second semiconductor layer comprises vertical sidewalls formed on inner sidewalls of the contact trenches;   forming a metallic layer on the second semiconductor layer; and   forming a conductive contact layer on the metallic layer.   
     
     
         2 . The method of  claim 1 , further comprising:
 after forming the metallic layer and prior to forming the conductive contact layer, performing an anneal, wherein the anneal forms a silicide region between the second semiconductor layer and the metallic layer.   
     
     
         3 . The method of  claim 1 , further comprising:
 after forming the conductive contact layer, performing an anneal, wherein the anneal forms a silicide region between second semiconductor layer and the metallic layer.   
     
     
         4 . The method of  claim 1 , further comprising:
 forming, prior to forming the conductive contact layer, a conductive contact liner on the metallic layer.   
     
     
         5 . The method of  claim 1 , further comprising: prior to forming the second semiconductor layer, forming an interlayer on the exposed portion of the source/drain regions. 
     
     
         6 . The method of  claim 5 , wherein the interlayer comprises at least one of impurities, dopants, and band edge materials. 
     
     
         7 . The method of  claim 1 , further comprising:
 removing the second semiconductor layer, the metallic layer, and the conductive contact layer from the dielectric layer, wherein the dielectric layer acts as a stop layer.

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