US2013313004A1PendingUtilityA1

Package substrate

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Assignee: SAMSUNG ELECTRO MECHPriority: Dec 26, 2007Filed: Jul 30, 2013Published: Nov 28, 2013
Est. expiryDec 26, 2027(~1.5 yrs left)· nominal 20-yr term from priority
Inventors:Jin Yong AnChang-Sup RyuJong-Kuk Hong
H10W 70/685H10W 70/635H10W 70/687H05K 1/09H05K 2203/1536H05K 2201/0367Y10T29/49155H05K 3/4007H05K 1/02Y10T428/24851H05K 2201/096H05K 2203/0384Y10T29/49126H05K 3/4644H05K 2201/09481Y10T29/49204H05K 3/0097Y10T428/24917H05K 2203/0726
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Claims

Abstract

A package substrate includes a solder resist layer having a level surface, a circuit pattern buried in the solder resist layer, and a bump protruding from the solder resist layer.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A package substrate comprising:
 a solder resist layer having a level surface;   a circuit pattern buried in the solder resist layer; and   a bump protruding from the solder resist layer.   
     
     
         2 . The package substrate of  claim 1 , wherein a surface treatment layer is stacked over the bump.

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