US2014011337A1PendingUtilityA1

Multi-layer mask for substrate dicing by laser and plasma etch

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Assignee: HOLDEN JAMES MPriority: Jun 15, 2011Filed: Sep 10, 2013Published: Jan 9, 2014
Est. expiryJun 15, 2031(~4.9 yrs left)· nominal 20-yr term from priority
Inventors:James M. HoldenWei-Sheng LeiBrad EatonTodd EganSaravjeet Singh
H10P 72/7416H10P 72/7402H10P 72/0468H10P 50/692H10P 50/244H10P 54/00B23K 2103/50B23K 26/364B23K 2103/42B23K 2103/172B23K 26/40B23K 26/402H01L 21/78
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Claims

Abstract

Methods of dicing substrates having a plurality of ICs. A method includes forming a multi-layered mask comprising a first mask material layer soluble in a solvent over the semiconductor substrate and a second mask material layer, insoluble in the solvent, over the first mask material layer. The multi-layered mask is patterned with a laser scribing process to provide a patterned mask with gaps. The patterning exposes regions of the substrate between the ICs. The substrate is then plasma etched through the gaps in the patterned mask to singulate the IC with the second mask material layer protecting the first mask material layer for at least a portion of the plasma etch. The soluble material layer is dissolved subsequent to singulation to remove the multi-layered mask.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A method of dicing a substrate comprising a plurality of ICs, the method comprising:
 forming a multi-layer mask over the substrate covering and protecting the ICs, the multi-layer mask including a first mask material layer disposed on a top surface of the ICs and a second mask material layer disposed over the first mask material layer;   patterning the multi-layer mask with a laser scribing process to provide a patterned mask with gaps, exposing regions of the substrate between the ICs;   plasma etching the substrate through the gaps in the patterned mask to singulate the ICs, wherein the second mask material layer protects the first mask material layer from exposure to the plasma for at least a portion of etching process;   removing at least a portion of the second mask material layer; and   subsequent to removing the portion of the second mask material layer, removing the first mask material layer.   
     
     
         2 . The method of  claim 1 , wherein removing at least the portion of the second mask material layer comprises removing the entire second mask material layer prior to removing the first mask material layer. 
     
     
         3 . The method of  claim 1 , wherein removing at least the portion of the second mask material layer comprises plasma etching the second mask material layer. 
     
     
         4 . The method of  claim 3 , wherein plasma etching the second mask material layer comprises using SF 6  and at least one of C 4 F 8  and C 4 F 6 . 
     
     
         5 . The method of  claim 1 , wherein removing the first mask material layer comprises dissolving the first mask material layer. 
     
     
         6 . The method of  claim 5 , wherein dissolving the first mask material layer comprises dissolving in an aqueous solution. 
     
     
         7 . The method of  claim 1 , wherein removing at least the portion of the second mask material layer comprises plasma etching the second mask material layer, and wherein removing the first mask material layer comprises dissolving the first mask material layer. 
     
     
         8 . The method of  claim 1 , wherein the first mask material layer comprises a water soluble polymer, and wherein etching the semiconductor substrate comprises etching the trenches with a deep trench etch process during which the first mask material layer is maintained below 100° C. 
     
     
         9 . The method of  claim 8 , wherein the forming the multi-layer mask comprises applying at least one of: poly(vinyl alcohol), poly(acrylic acid), poly(methacrylic acid), poly(acrylamide), or poly(ethylene oxide) as the first mask material layer in contact with the top surface of the IC. 
     
     
         10 . The method of  claim 1 , wherein forming the multi-layer mask comprises applying a non-water soluble polymer over the first mask material layer. 
     
     
         11 . The method of  claim 10 , wherein applying the non-water soluble polymer further comprises applying at least one of photoresist and polyimide. 
     
     
         12 . The method of  claim 1 , wherein forming the multi-layer mask further comprises forming the multi-layered mask to a thickness of no more than 20 μm over the street between the ICs and at least 10 μm over a top bump surface of an IC. 
     
     
         13 . The method of  claim 1 , wherein patterning the mask further comprises direct writing the pattern with a femtosecond laser having a wavelength less than or equal to 540 nanometers and a laser pulse width less than or equal to 400 femtoseconds. 
     
     
         14 . The method of  claim 1 , wherein forming the multi-layered mask comprises:
 spin coating a solution of the first mask material layer onto the top surface of the IC; and   spin coating a solution of the second mask material layer, or vapor depositing the second mask material layer, over the first mask material layer.   
     
     
         15 . The method of  claim 14 , further comprising thinning the substrate with a backside grind process, wherein the spin coating of the first mask material layer is performed after the backside grind. 
     
     
         16 . The method of  claim 14 , wherein spin coating the solution of the second mask material layer or vapor depositing the second mask material layer over the first mask material layer further comprises chemical vapor depositing an amorphous carbon layer over the first mask material layer. 
     
     
         17 . A method of dicing a semiconductor substrate comprising a plurality of ICs, the method comprising:
 forming a water soluble mask material layer over a silicon substrate, the water soluble mask material layer covering the ICs disposed on the silicon substrate, the ICs comprising a thin film stack including a layer of silicon dioxide, a layer of low-κ material and a layer of copper;   forming a non-water soluble mask material layer over the water soluble mask material layer;   patterning the photo-resist layer, the layer of low-κ material, and the layer of copper with a femtosecond laser to expose regions of the silicon substrate between the ICs; and   etching the silicon substrate through the gaps to singulate the ICs, the non-water soluble mask material layer protecting the water soluble mask material layer from exposure to plasma through at least a portion of the silicon substrate etching;   removing at least a portion of the non-water soluble mask material layer; and   subsequent to removing the portion of the non-water soluble mask material layer, removing the water soluble mask material layer.   
     
     
         18 . The method of  claim 17 , wherein removing at least the portion of the non-water soluble mask material layer comprises removing the entire non-water soluble mask material layer prior to removing the water soluble mask material layer. 
     
     
         19 . The method of  claim 17 , wherein removing at least the portion of the non-water soluble mask material layer comprises plasma etching the non-water soluble mask material layer, and wherein removing the water soluble mask material layer comprises dissolving the water soluble mask material layer. 
     
     
         20 . The method of  claim 17 , wherein patterning the layer of silicon dioxide, the layer of low-κ material, and the layer of copper with the femtosecond laser comprises ablating the layer of silicon dioxide prior to ablating the layer of low-κ material and the layer of copper, and wherein etching the silicon substrate comprises exposing the substrate to a plasma of SF 6  and at least one of C 4 F 8  and C 4 F 6  while maintaining the water soluble mask material layer at a temperature below 100° C. 
     
     
         21 . A system for dicing a substrate comprising a plurality of ICs, the system comprising:
 a laser scribe module to pattern a multi-layered mask and expose regions of a substrate between the ICs;   a plasma etch module physically coupled to the laser scribe module to singulate the ICs by plasma etching of the substrate;   a robotic transfer chamber to transfer a laser scribed substrate from the laser scribe module to the plasma etch module, and   at least one of a mask formation module or a solvent wet clean module, the mask formation module comprising either a spin coater or a chemical vapor deposition (CVD) chamber.   
     
     
         22 . The system of  claim 21 , wherein the laser scribe comprises a femtosecond laser having a wavelength less than or equal to 540 nanometers and a pulse width of less than or equal to 400 femtoseconds. 
     
     
         23 . The system of  claim 21 , comprising the mask formation module, wherein the chemical vapor deposition (CVD) chamber is to deposit a CVD carbon layer. 
     
     
         24 . The system of  claim 21 , wherein the plasma etch chamber is coupled to SF 6  and at least one of C 4 F 8  and C 4 F 6 .

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