Light-emitting diode with current-spreading region

Abstract

A light-emitting diode (LED) device is provided. The LED device has a lower LED layer and an upper LED layer with a light-emitting layer interposed therebetween. A current blocking layer is formed in the upper LED layer such that current passing between an electrode contacting the upper LED layer flows around the current blocking layer. When the current blocking layer is positioned between the electrode and the light-emitting layer, the light emitted by the light-emitting layer is not blocked by the electrode and the light efficiency is increased. The current blocking layer may be formed by converting a portion of the upper LED layer into a resistive region. In an embodiment, ions such as magnesium, carbon, or silicon are implanted into the upper LED layer to form the current blocking layer.

1 . A lighting apparatus, comprising:
 a substrate;   a first semiconductor layer located over the substrate;   a light-emitting layer located over the first semiconductor layer;   a second semiconductor layer located over the light-emitting layer;   a resistive element embedded within the second semiconductor layer; and   a conductive element located over the second semiconductor layer, wherein the conductive element vertically blocks the resistive element.   
     
     
         2 . The lighting apparatus of  claim 1 , wherein the resistive element contains impurities. 
     
     
         3 . The lighting apparatus of  claim 2 , wherein the impurities include silicon, carbon, or magnesium. 
     
     
         4 . The lighting apparatus of  claim 1 , wherein a lateral dimension of the resistive element is in a range from about 50 angstroms to about 500 microns. 
     
     
         5 . The lighting apparatus of  claim 1 , wherein the resistive element is embedded near a bottom surface of the second semiconductor layer. 
     
     
         6 . The lighting apparatus of  claim 1 , wherein:
 the first semiconductor layer contains a first group III-V compound;   the second semiconductor layer contains a second group III-V compound; and   the first group III-V compound and the second group III-V compound have different types of conductivity.   
     
     
         7 . The lighting apparatus of  claim 1 , wherein the conductive element is a first conductive element and is electrically connected to the second semiconductor layer, and wherein the lighting apparatus further comprises a second conductive element that is located over, and electrically connected to, the first semiconductor layer. 
     
     
         8 . The lighting apparatus of  claim 1 , wherein the first and second conductive elements each contain titanium, aluminum, gold, or nickel, or alloys thereof. 
     
     
         9 . The lighting apparatus of  claim 1 , wherein the substrate is a silicon substrate, a sapphire substrate, or a silicon carbide substrate. 
     
     
         10 . A lighting apparatus, comprising:
 a substrate, wherein the substrate contains silicon, silicon carbide, or sapphire;   a first doped group III-V compound layer formed over the substrate;   a multiple quantum well (MQW) layer formed over the first doped group III-V compound layer;   a second doped group III-V compound layer formed over the MQW layer, wherein the first and second doped group III-V compound layers have different types of conductivity;   a first electrode formed over, and electrically coupled to, the first doped group III-V compound layer;   a second electrode formed over, and electrically coupled to, the second doped group III-V compound layer; and   a current-blocking layer formed within the second doped group III-V compound layer, wherein the current-blocking layer is located below, and vertically aligned with, the first electrode.   
     
     
         11 . The lighting apparatus of  claim 10 , wherein the current-blocking layer contains implanted impurities and has a width ranging from about 50 angstroms to about 500 microns. 
     
     
         12 . The lighting apparatus of  claim 10 , wherein the implanted impurities include silicon, carbon, or magnesium. 
     
     
         13 . A method of fabricating a lighting apparatus, comprising:
 growing a first semiconductor layer over a substrate;   growing a light-emitting layer over the first semiconductor layer;   growing a second semiconductor layer over the light-emitting layer;   implanting impurities in the second semiconductor layer, thereby forming a resistive element embedded within the second semiconductor layer; and   forming a conductive element over the second semiconductor layer, wherein the conductive element is formed to vertically block the resistive element.   
     
     
         14 . The method of  claim 13 , wherein the implanting comprises implanting one of the following impurities: silicon, carbon, or magnesium. 
     
     
         15 . The method of  claim 13 , wherein the implanting is performed such that a lateral dimension of the resistive element is in a range from about 50 angstroms to about 500 microns. 
     
     
         16 . The method of  claim 13 , further comprising, before the implanting: forming a photoresist mask over the second semiconductor layer, the photoresist mask including an opening, wherein the implanting comprises implanting the impurities through the opening. 
     
     
         17 . The method of  claim 13 , wherein the forming of the conductive element comprises a self-aligned lift-off process. 
     
     
         18 . The method of  claim 13 , wherein:
 the first semiconductor layer contains a first group III-V compound;   the second semiconductor layer contains a second group III-V compound; and   the first group III-V compound and the second group III-V compound have different types of conductivity.   
     
     
         19 . The method of  claim 13 , wherein the substrate is a silicon substrate, a sapphire substrate, or a silicon carbide substrate. 
     
     
         20 . The method of  claim 13 , further comprising: forming a third semiconductor layer over the second semiconductor layer, wherein the third semiconductor layer and the second semiconductor layer have the same material composition.