Semiconductor light emitting device and wafer

Abstract

According to one embodiment, a semiconductor light emitting device includes: a foundation layer, a first semiconductor layer, a light emitting part, and a second semiconductor layer. The foundation layer includes a nitride semiconductor. The foundation layer has a dislocation density not more than 5×10 8 cm −2 . The first semiconductor layer of a first conductivity type is provided on the foundation layer and includes a nitride semiconductor. The light emitting part is provided on the first semiconductor layer. The light emitting part includes: a plurality of barrier layers; and a well layer provided between the barrier layers. The well layer has a bandgap energy smaller than a bandgap energy of the barrier layers and has a thickness larger than a thickness of the barrier layers. The second semiconductor layer of a second conductivity type different from the first conductivity type, is provided on the light emitting part and includes a nitride semiconductor.

1 . (canceled) 
     
     
         2 : A semiconductor light emitting device, comprising:
 a foundation layer including a nitride semiconductor, a first semiconductor layer of a first conductivity type provided on the foundation layer and including a nitride semiconductor;   a light emitting part provided on the first semiconductor layer, the light emitting part including:
 a first well layer; 
 a second well layer; and 
 a barrier layer provided between the first well layer and the second well layer, the barrier layer contacting the first well layer and the second well layer, a first thickness of the first well layer being larger than a thickness of the barrier layer, a second thickness of the second well layer being larger than the thickness of the barrier layer; and 
   a second semiconductor layer of a second conductivity type different from the first conductivity type, provided on the light emitting part and including a nitride semiconductor,   a light emission efficiency of the device having a maximum efficiency value at a first current value of a current flowing between the first semiconductor layer and the second semiconductor layer,   the light emission efficiency of the device having a second efficiency value at a second current value of the current, the second current value being ten times the first current value, and   the second efficiency value being not less than 82% of the maximum efficiency value.   
     
     
         3 : The device according to  claim 2 , wherein the foundation layer has a dislocation density not more than 4×10 8  cm −2 . 
     
     
         4 : The device according to  claim 2 , wherein the thickness of the barrier layer is not less than 0.5 nanometers and not more than 3 nanometers. 
     
     
         5 : The device according to  claim 2 , wherein each of the first thickness and the second thickness is not less than 3.2 nanometers. 
     
     
         6 : The device according to  claim 2 , wherein the foundation layer has protrusions and recessions provided on a lower face of the foundation layer on a side opposite to the first semiconductor layer. 
     
     
         7 : The device according to  claim 2 , wherein an impurity concentration in the foundation layer is lower than an impurity concentration in the first semiconductor layer. 
     
     
         8 : The device according to  claim 2 , wherein the foundation layer includes an undoped GaN layer. 
     
     
         9 : The device according to  claim 2 , further comprising:
 a buffer layer,   the foundation layer being disposed between the buffer layer and the first semiconductor layer, and the buffer layer including Ga x1 Al 1-x1 N (0.1≦x1<0.5).   
     
     
         10 : The device according to  claim 9 , wherein a thickness of the buffer layer is not less than 20 nanometers and not more than 50 nanometers. 
     
     
         11 : The device according to  claim 9 , wherein the buffer layer includes an undoped GaN layer. 
     
     
         12 : The device according to  claim 9 , wherein a formation temperature of the buffer layer is lower than 800° C. 
     
     
         13 : The device according to  claim 2 , wherein a peak wavelength of light emitted from the light emitting part is not less than 400 nanometers and not more than 650 nanometers. 
     
     
         14 : The device according to  claim 2 , wherein the foundation layer has a dislocation density not more than 5×10 8  cm −2 .