Semiconductor Die and Method of Forming FO-WLCSP Vertical Interconnect Using TSV and TMV

Abstract

A semiconductor device has a TSV wafer and semiconductor die mounted over the TSV wafer. A channel is formed through the TSV wafer. An encapsulant is deposited over the semiconductor die and TSV wafer. Conductive TMV are formed through the encapsulant over the conductive TSV and contact pads of the semiconductor die. The conductive TMV can be formed through the channel. A conductive layer is formed over the encapsulant and electrically connected to the conductive TMV. The conductive TMV are formed during the same manufacturing process. An insulating layer is formed over the encapsulant and conductive layer. A plurality of semiconductor die of the same size or different sizes can be stacked over the TSV wafer. The plurality of semiconductor die can be stacked over opposite sides of the TSV wafer. An internal stacking module can be stacked over the semiconductor die and electrically connected through the conductive TMV.

What is claimed: 
     
         1 . A semiconductor device, comprising:
 a substrate separated from a substrate panel, the substrate including a first surface and a second surface opposite the first surface;   a first semiconductor die disposed over the first surface of the substrate;   an encapsulant deposited over the first semiconductor die and the first surface of the substrate to leave a peripheral ring of the encapsulant around an outer edge of the substrate after singulation through the encapsulant; and   an interconnect structure formed over the second surface of the substrate.   
     
     
         2 . The semiconductor device of  claim 1 , wherein the interconnect structure includes a bump. 
     
     
         3 . The semiconductor device of  claim 1 , further including a plurality of bumps formed over the first semiconductor die and electrically connected to a conductive layer on the first surface of the substrate. 
     
     
         4 . The semiconductor device of  claim 1 , further including a conductive layer formed over the substrate to provide electrical routing. 
     
     
         5 . The semiconductor device of  claim 1 , further including a conductive via formed through the substrate. 
     
     
         6 . The semiconductor device of  claim 1 , further including a second semiconductor die disposed over the substrate. 
     
     
         7 . A semiconductor device, comprising:
 a substrate including a first surface and a second surface opposite the first surface;   a first semiconductor die disposed over the first surface of the substrate; and   an encapsulant deposited over the first semiconductor die and the first surface of the substrate to form an encapsulated assembly with the encapsulant disposed around an outer edge of the substrate.   
     
     
         8 . The semiconductor device of  claim 7 , further including a plurality of bumps formed over the first surface of the substrate. 
     
     
         9 . The semiconductor device of  claim 7 , further including a conductive via formed through the substrate to provide electrical routing. 
     
     
         10 . The semiconductor device of  claim 7 , further including a conductive layer formed over the first surface of the substrate. 
     
     
         11 . The semiconductor device of  claim 10 , further including a plurality of stud bumps formed over the substrate and electrically connected to the conductive layer. 
     
     
         12 . The semiconductor device of  claim 7 , wherein a peripheral ring of encapsulant remains from singulation of the encapsulated assembly through the encapsulant and the encapsulant covers the outer edge of the substrate entirely. 
     
     
         13 . The semiconductor device of  claim 7 , further including a second semiconductor die disposed over the substrate. 
     
     
         14 . A semiconductor device, comprising:
 a first substrate separated from a substrate panel;   a second substrate separated from the first substrate by a space;   a first semiconductor die disposed over the first substrate; and   an encapsulant deposited over the first semiconductor die and in the space between the first and second substrates with the encapsulant disposed over an outer edge of the first and second substrates.   
     
     
         15 . The semiconductor device of  claim 14 , further including a plurality of bumps disposed over a surface of the first substrate. 
     
     
         16 . The semiconductor device of  claim 14 , further including a conductive via formed through the first substrate to provide electrical routing. 
     
     
         17 . The semiconductor device of  claim 14 , further including a conductive layer formed over a surface of the first substrate. 
     
     
         18 . The semiconductor device of  claim 17 , further including a plurality of stud bumps formed over the first substrate and electrically connected to the conductive layer on the surface of the first substrate. 
     
     
         19 . The semiconductor device of  claim 14 , further including a second semiconductor die disposed over the second substrate. 
     
     
         20 . A semiconductor device, comprising:
 a substrate separated from a substrate panel;   a semiconductor die disposed over the substrate; and   an encapsulant deposited over the semiconductor die with the encapsulant disposed around an outer edge of the substrate.   
     
     
         21 . The semiconductor device of  claim 20 , further including an interconnect structure formed between the semiconductor die and substrate. 
     
     
         22 . The semiconductor device of  claim 20 , further including a conductive layer formed over a surface of the substrate. 
     
     
         23 . The semiconductor device of  claim 22 , further including a plurality of bumps or stud bumps formed over the substrate and electrically connected to the conductive layer. 
     
     
         24 . The semiconductor device of  claim 20 , further including a conductive via formed through the substrate to provide electrical routing through the substrate. 
     
     
         25 . The semiconductor device of  claim 20 , further including a conductive via formed through the encapsulant and extending to the substrate.