Semiconductor package and method of fabricating the same

Abstract

Provided are a semiconductor package and a method of fabricating the same. The package substrate includes a hole, which may be used to form a mold layer without any void. The mold layer may be partially removed to expose a lower conductive pattern. Accordingly, it is possible to improve routability of solder balls.

What is claimed is: 
     
         1 . A semiconductor package, comprising:
 a package substrate including at least one hole;   at least one lower conductive pattern on a bottom surface of the package substrate;   at least one semiconductor chip mounted on the package substrate in a flip-chip bonding manner; and   a mold layer on the package substrate, the mold layer including,
 an upper mold portion covering the at least one semiconductor chip and a top surface of the package substrate, and 
   a lower mold portion connected to the upper mold portion through the at least one hole to cover at least a portion of the bottom surface of the package substrate and expose at least a portion of the lower conductive pattern, and the lower mold portion including a mold bottom surface defining a lower mold hole exposing the at least one portion of the lower conductive pattern.