Multi-layer circuit board

Abstract

A multi-layer circuit board includes a plurality of circuit substrates, a plurality of dielectric layers, and a plurality of metal bumps. Each circuit substrate includes two first trace layers and an insulating layer between the two trace layers. Each electric layer is laminated between two neighboring circuit substrates. At latest one metal bump is arranged between each two neighboring circuit substrates. Each metal bump passes through one dielectric layer. Two opposite ends of each metal bump are connected with the trace layer of the circuit substrate to be electrically connected to the two neighbor circuit substrates.

What is claimed is: 
     
         1 . A multi-layer circuit board comprising:
 a plurality of circuit substrates, each of the plurality of circuit substrates comprising two first trace layers and an insulating layer between the two trace layers;   a plurality of dielectric layers, each of the plurality of dielectric layers being laminated between two neighboring circuit substrates; and   a plurality of metal bumps, at latest one of the plurality of metal bumps being arranged between two neighboring circuit substrates of the plurality of circuit substrates, each metal bump passing through one dielectric layer, two opposite ends of each metal bump connected with the trace layer of the circuit substrate to be electrically connected to the two neighbor circuit substrates.   
     
     
         2 . The multi-layer circuit board of  claim 1 , wherein each of the plurality of the metal bump comprises a copper layer and a tin layer, and the tin layer is connected with the trace layer of the adjacent circuit substrate. 
     
     
         3 . The multi-layer circuit board of  claim 1 , wherein each of the plurality of the dielectric layer is composed of an Ajinomoto build-up film.