Integrated circuit system with carrier construction configuration and method of manufacture thereof

Abstract

A method of manufacture of an integrated circuit system includes: providing a semiconductor wafer with a bond pad; attaching a detachable carrier to the semiconductor wafer, the detachable carrier including a carrier frame portion and a terminal structure; removing the carrier frame portion with the terminal structure attached to the semiconductor wafer; and forming an encapsulation encapsulating the semiconductor wafer, the bond pad, and the terminal structure.

What is claimed is: 
     
         1 . A method of manufacture of an integrated circuit system comprising:
 providing a semiconductor wafer with a bond pad;   attaching a detachable carrier to the semiconductor wafer, the detachable carrier including a carrier frame portion and a terminal structure;   removing the carrier frame portion with the terminal structure attached to the semiconductor wafer; and   forming an encapsulation encapsulating the semiconductor wafer, the bond pad, and the terminal structure.   
     
     
         2 . The method as claimed in  claim 1  wherein attaching the detachable carrier includes attaching the detachable carrier formed or provided separately from the semiconductor wafer. 
     
     
         3 . The method as claimed in  claim 1  wherein attaching the detachable carrier includes attaching the terminal structure to the bond pad using a conductive connector. 
     
     
         4 . The method as claimed in  claim 1  wherein attaching the detachable carrier includes aligning the detachable carrier to the semiconductor wafer based on the carrier frame portion, the terminal structure, the semiconductor wafer, the bond pad, a portion or an edge thereof, or a combination thereof. 
     
     
         5 . The method as claimed in  claim 1  wherein attaching the detachable carrier includes attaching the detachable carrier including the terminal structure having a sintered characteristic. 
     
     
         6 . The method as claimed in  claim 1  wherein:
 providing the semiconductor wafer includes providing a base integrated circuit structure including the semiconductor wafer and a passivation layer directly contacting the semiconductor wafer, the bond pad, or a combination thereof; 
 forming the encapsulation includes forming an encapsulation surface coplanar with a conductor surface of the terminal structure; 
 
       further comprising:
 forming the semiconductor wafer based on thinning the base integrated circuit structure exposed from the encapsulation; and 
 attaching a solder bump on the conductor surface of the terminal structure. 
 
     
     
         7 . The method as claimed in  claim 6  further comprising:
 providing the carrier frame portion for forming a detachable carrier; 
 forming a release layer on a surface of the carrier frame portion; and 
 forming the terminal structure directly on and directly contacting the release layer based on a sintering process for forming the detachable carrier. 
 
     
     
         8 . The method as claimed in  claim 6  wherein:
 attaching a detachable carrier includes attaching the terminal structure to the bond pad of the semiconductor wafer, the terminal structure attached to and directly contacting a release layer of the carrier frame portion; and 
 removing the carrier frame portion includes peeling the carrier frame portion along with the release layer away from the terminal structure attached to the bond pad. 
 
     
     
         9 . The method as claimed in  claim 6  wherein:
 providing the semiconductor wafer includes providing the base integrated circuit structure including a base peripheral edge of the semiconductor wafer, a pattern reference location of the passivation layer, a pad reference location of the bond pad, or a combination thereof; 
 attaching the detachable carrier includes:
 providing the detachable carrier including a carrier peripheral edge of the carrier frame portion, a conductor reference location of the terminal structure, or a combination thereof; and 
 aligning the detachable carrier and the semiconductor wafer based on the base peripheral edge, the carrier peripheral edge, the pattern reference location, the pad reference location, the conductor reference location, or a combination thereof. 
 
 
     
     
         10 . The method as claimed in  claim 6  wherein attaching the detachable carrier includes attaching the terminal structure formed without a seed layer and without a photoresist layer on the semiconductor wafer. 
     
     
         11 . An integrated circuit system comprising:
 a semiconductor wafer with a bond pad;   a terminal structure directly attached to the bond pad with a conductive connector; and   an encapsulation encapsulating the semiconductor wafer, the bond pad, and the terminal structure.   
     
     
         12 . The integrated circuit system as claimed in  claim 11  wherein the terminal structure includes a sintered characteristic. 
     
     
         13 . The integrated circuit system as claimed in  claim 11  wherein the terminal structure includes a tapering shape. 
     
     
         14 . The integrated circuit system as claimed in  claim 11  wherein the terminal structure includes a conductor surface having a released-structure characteristic. 
     
     
         15 . The integrated circuit system as claimed in  claim 11  further comprising:
 a passivation layer directly contacting the semiconductor wafer, the bond pad, or a combination thereof; 
 
       wherein:
 the encapsulation directly contacts the bond pad, the passivation layer, or a combination thereof without remaining photoresist layer; and 
 the terminal structure directly attached to the bond pad without a seed layer. 
 
     
     
         16 . A manufacturing system comprising:
 a carrier frame portion;   a release layer directly contacting the carrier frame portion; and   a terminal structure directly contacting the release layer and attached to the carrier frame portion for manufacturing an integrated circuit system.   
     
     
         17 . The system as claimed in  claim 11  wherein the terminal structure including a sintered characteristic. 
     
     
         18 . The system as claimed in  claim 11  wherein the release layer includes release layer characteristic for detaching the terminal structure from the release layer, the carrier frame portion, or a combination thereof to manufacture the integrated circuit system. 
     
     
         19 . The system as claimed in  claim 11  wherein the terminal structure includes a tapering shape. 
     
     
         20 . The system as claimed in  claim 11  further comprising:
 a conductive connector directly contacting the terminal structure opposite the carrier frame portion; 
 
       wherein:
 the conductive connector is directly attached to the release layer and the conductive connector without a seed layer and without a photoresist layer.