Semiconductor structure(s) with extended source/drain channel interfaces and methods of fabrication
Abstract
Semiconductor structures and methods of fabrication are provided, with one or both of an extended source-to-channel interface or an extended drain-to-channel interface. The fabrication method includes, for instance, recessing a semiconductor material to form a cavity adjacent to a channel region of a semiconductor structure being fabricated, the recessing forming a first cavity surface and a second cavity surface within the cavity; and implanting one or more dopants into the semiconductor material through the first cavity surface to define an implanted region within the semiconductor material, and form an extended channel interface, the extended channel interface including, in part, an interface of the implanted region within the semiconductor material to the channel region of the semiconductor structure. In one embodiment, the semiconductor structure with the extended channel interface is a FinFET.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A device comprising:
a semiconductor structure, the semiconductor structure comprising:
a source region and a drain region separated by a channel region, the channel region residing within a semiconductor material;
the source region comprising an implanted source region within the semiconductor material and an epitaxial source region being disposed above the implanted source region; and
the drain region comprising an implanted drain region within the semiconductor material and an epitaxial drain region being disposed above the implanted drain region;
wherein the implanted source region provides the semiconductor structure with an extended source channel interface, the epitaxial source region provides the semiconductor structure with an extended source channel interface comprising, in part, a sidewall interface of the epitaxial source region to the channel region, the implanted drain region provides the semiconductor structure with an extended drain channel interface, and the epitaxial drain region provides the semiconductor structure with an extended drain channel interface comprising, in part, a sidewall interface of the epitaxial drain region to the channel region.
2 . The device of claim 1 , wherein the semiconductor device comprises a fin-type field effect transistor (FinFET) and the extended source channel interface and the extended drain channel interface together extend the channel region of the FinFET within the semiconductor material.
3 . The device of claim 2 , wherein the extended source channel interface and the extended drain channel interface increase junction on-current while minimizing junction leakage current of the FinFET.
4 . The device of claim 1 , wherein an interface of the implanted source region to the channel region is at an angle relative to the sidewall interface of the epitaxial source region to the channel region, and wherein an interface of the implanted drain region to the channel region is at an angle relative to the sidewall interface of the epitaxial drain region to the channel region.
5 . The device of claim 4 , wherein the semiconductor device comprises a fin-type field effect transistor (FinFET) and the extended source channel interface and the extended drain channel interface together extend the channel region of the FinFET within the semiconductor material.
6 . The device of claim 5 , wherein the extended source channel interface and the extended drain channel interface increase junction on-current while minimizing junction leakage current of the FinFET.
7 . The device of claim 1 , wherein an interface of the implanted source region to the channel region is non-planar with the sidewall interface of the epitaxial source region to the channel region, and wherein an interface of the implanted drain region to the channel region is non-planar with the sidewall interface of the epitaxial drain region to the channel region.
8 . The device of claim 7 , wherein the semiconductor device comprises a fin-type field effect transistor (FinFET) and the extended source channel interface and the extended drain channel interface together extend the channel region of the FinFET within the semiconductor material.
9 . The device of claim 8 , wherein the extended source channel interface and the extended drain channel interface increase junction on-current while minimizing junction leakage current of the FinFET.
10 . The device of claim 1 , wherein an interface of the implanted source region to the channel region is coplanar with the sidewall interface of the epitaxial source region to the channel region, and wherein an interface of the implanted drain region to the channel region is coplanar with the sidewall interface of the epitaxial drain region to the channel region.
11 . The device of claim 10 , wherein the semiconductor device comprises a fin-type field effect transistor (FinFET) and the extended source channel interface and the extended drain channel interface together extend the channel region of the FinFET within the semiconductor material.
12 . The device of claim 11 , wherein the extended source channel interface and the extended drain channel interface increase junction on-current while minimizing junction leakage current of the FinFET.
13 . A device comprising:
a semiconductor structure, the semiconductor structure comprising:
a source region and a drain region separated by a channel region, the channel region residing within a semiconductor material and the source region and the drain region respectively comprising an implanted source region within the semiconductor material and an implanted drain region within the semiconductor material ; and
wherein the implanted source region provides the semiconductor structure with an extended source channel interface and the implanted drain region provides the semiconductor structure with an extended drain channel interface.
14 . The device of claim 13 , wherein the semiconductor device comprises a fin-type field effect transistor (FinFET) and the extended source channel interface and the extended drain channel interface together extend the channel region of the FinFET within the semiconductor material.
15 . The device of claim 13 , wherein an interface of the implanted source region to the channel region is at an angle relative to the sidewall interface of the epitaxial source region to the channel region, and wherein an interface of the implanted drain region to the channel region is at an angle relative to the sidewall interface of the epitaxial drain region to the channel region.
16 . The device of claim 15 , wherein the semiconductor device comprises a fin-type field effect transistor (FinFET) and the extended source channel interface and the extended drain channel interface together extend the channel region of the FinFET within the semiconductor material.
17 . The device of claim 13 , wherein an interface of the implanted source region to the channel region is non-planar with the sidewall interface of the epitaxial source region to the channel region, and wherein an interface of the implanted drain region to the channel region is non-planar with the sidewall interface of the epitaxial drain region to the channel region.
18 . The device of claim 17 , wherein the semiconductor device comprises a fin-type field effect transistor (FinFET) and the extended source channel interface and the extended drain channel interface together extend the channel region of the FinFET within the semiconductor material.
19 . The device of claim 13 , wherein an interface of the implanted source region to the channel region is coplanar with the sidewall interface of the epitaxial source region to the channel region, and wherein an interface of the implanted drain region to the channel region is coplanar with the sidewall interface of the epitaxial drain region to the channel region.
20 . The device of claim 19 , wherein the semiconductor device comprises a fin-type field effect transistor (FinFET) and the extended source channel interface and the extended drain channel interface together extend the channel region of the FinFET within the semiconductor material.Cited by (0)
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