Method and System for Packing Optimization of Semiconductor Devices

Abstract

Provided is a disclosure for optimizing the number of semiconductor devices on a wafer/substrate. The optimization comprises laying out, cutting, and packaging the devices efficiently.

1 . A substrate comprising interconnects, wherein the interconnects comprise edge interconnects along edges of the substrate, and at least one of the edges is a rounded non-linear edge. 
     
     
         2 . The substrate of  claim 1 , wherein the interconnects comprise a plurality of non-circular interconnects with a major axis and a minor axis. 
     
     
         3 . The substrate of  claim 2 , wherein the major axis of at least one of the plurality of non-circular interconnects is substantially perpendicular to: a radial axis of the substrate, or to a line that is parallel to a radial axis of the substrate. 
     
     
         4 . The substrate of  claim 1 , wherein the edge interconnects are configured to form interconnects that hang over a corresponding edge when solder of the substrate is reflowed. 
     
     
         5 . The substrate of  claim 1 , wherein a perimeter of the substrate tracks a contour of individual ones of the edge interconnects. 
     
     
         6 . The substrate of  claim 1 , comprising:
 a first row of horizontally aligned first interconnects; and   a second row of second interconnects that are immediately below the first row of first interconnects,   wherein:
 the first row is parallel to the second row, 
 the first interconnects have a first pitch, 
 the second interconnects have the first pitch, 
 a first line through a center of each of the first interconnects is parallel to a second line through a center of each of the second interconnects, and 
 the first pitch is different than a vertical distance from the first line to the second line. 
   
     
     
         7 . A substrate comprising interconnects, wherein:
 a plurality of the interconnects are non-circular interconnects, and each non-circular interconnect has a major axis and a minor axis,   a first substrate axis extends from a center of the substrate to a perimeter of the substrate; and   a first row of the interconnects, with the major axes of the interconnects aligned with the first substrate axis, extends at constant intervals along a majority of the first substrate axis.   
     
     
         8 . The substrate of  claim 7 , wherein at least one of the non-circular interconnects is configured to have the major axis substantially twice as long as the minor axis. 
     
     
         9 . The substrate of  claim 7 , wherein the major axis of at least one of the non-circular interconnects is substantially perpendicular to: a radial axis of the substrate, or to a line that is parallel to a radial axis of the substrate. 
     
     
         10 . The substrate of  claim 7 , wherein:
 a second row comprises a plurality of the non-circular interconnects with the major axis for each of the plurality of the interconnects aligned co-linearly in a first direction, and   a third row immediately below the second row comprises a plurality of the non-circular interconnects with the minor axis for each of the plurality of the interconnects aligned co-linearly in the first direction.   
     
     
         11 . The substrate of  claim 7 , wherein the substrate comprises straight edges. 
     
     
         12 . The substrate of  claim 7 , wherein at least one of the interconnects is a circular interconnect. 
     
     
         13 . The substrate of  claim 7 , wherein the plurality of interconnects comprise a first set of interconnects with major axes aligned with a radial axis of the substrate and a second set of interconnects with major axes aligned to a line parallel to the radial axis of the substrate. 
     
     
         14 . The substrate of  claim 7 , wherein:
 the plurality of interconnects comprise:
 a first set of interconnects with major axes parallel to each other; and 
 a second set of interconnects with major axes parallel to each other, 
   the first and second sets are adjacent to each other,   a length of the first set extends a majority of a first distance from a center of the substrate to the perimeter of the substrate,   a length of the second set extends a majority of a second distance from the center of the substrate to the perimeter of the substrate, and   the major axes of the first set of interconnects are perpendicular to the major axes of the second set of interconnects.   
     
     
         15 . A substrate comprising:
 a first row of first interconnects aligned horizontally; and   a second row of second interconnects immediately below the first row,   wherein:
 the first row is parallel to the second row, 
 the first interconnects have a first pitch, 
 the second interconnects have the first pitch, 
 a first line through a center of each of the first interconnects is parallel to a second line through a center of each of the second interconnects, and 
 the first pitch is different than a vertical distance from the first line to the second line. 
   
     
     
         16 . The substrate of  claim 15 , comprising a plurality of non-circular interconnects that is longer along a direction of a major axis than in a direction of a minor axis. 
     
     
         17 . The substrate of  claim 16 , wherein the major axis of each of the plurality of non-circular interconnects is substantially perpendicular to: a radial axis of the substrate, or to a line that is parallel to a radial axis of the substrate. 
     
     
         18 . The substrate of  claim 15 , wherein one or more of the interconnects are edge interconnects formed to have a portion of the edge interconnect hang over a corresponding edge when solder of the substrate is reflowed. 
     
     
         19 . The substrate of  claim 15 , wherein at least one edge of the substrate is non-linear. 
     
     
         20 . The substrate of  claim 15 , wherein a perimeter of the substrate tracks contour of individual ones of the interconnects along a periphery of the substrate.