Semiconductor apparatus and method for preparing the same

Abstract

The present disclosure is directed to a semiconductor apparatus having a plurality of bonded semiconductor devices formed by a fusion bonding technique and a method for preparing the same. The semiconductor devices have conductive portions with higher coefficient of thermal expansion than their dielectric portions. By forming the depression to provide a space for the volume expansion of the conductive portion with higher coefficient of thermal expansion during the subsequent thermal treating process of the fusion bonding, the semiconductor apparatus formed of semiconductor devices by the fusion bonding technique does not exhibit a lateral protrusion into the interface between the two dielectric portions. As a result, the failure of the electrical function due to the lateral protrusion is effectively eliminated.

What is claimed is: 
     
         1 . A semiconductor apparatus, comprising:
 a first semiconductor device having a first conductive portion, a first dielectric portion adjacent to the first conductive portion, and a depression above an upper surface of the first conductive portion, wherein a coefficient of thermal expansion of the first conductive portion is higher than that of the first dielectric portion, and a volume of the depression is substantially the same as a volume expansion of the first conductive portion from a first temperature to a second temperature higher than the first temperature;   a second semiconductor device having a second conductive portion and a second dielectric portion adjacent to the second conductive portion; and   wherein the first conductive portion faces the second conductive portion, the depression separates the first conductive portion from the second conductive portion, and the first dielectric portion contacts the second dielectric portion.   
     
     
         2 . The semiconductor apparatus of  claim 4 , wherein the first conductive portion is directly bonded to the second conductive portion substantially in the absence of a solder material between the first conductive portion and the second conductive portion. 
     
     
         3 . A semiconductor apparatus, comprising:
 a first semiconductor device having a first conductive portion and a first dielectric portion adjacent to the first conductive portion; and   a second semiconductor device having a second conductive portion and a second dielectric portion adjacent to the second conductive portion;   wherein the first conductive portion is directly bonded to the second conductive portion substantially in the absence of a solder material between the first conductive portion and the second conductive portion, and the first dielectric portion is directly bonded to the second dielectric portion.   
     
     
         4 . The semiconductor apparatus of  claim 3 , wherein a coefficient of thermal expansion of the first conductive portion is higher than that of the first dielectric portion. 
     
     
         5 . The semiconductor apparatus of  claim 3 , wherein the first semiconductor device and the second semiconductor device are vertically bonded, and the first conductive portion contacts the second conductive portion substantially in the absence of a lateral protrusion into an interface between the first dielectric portion and the second dielectric portion. 
     
     
         6 . The semiconductor apparatus of  claim 3 , wherein the first semiconductor device and the second semiconductor device are directly bonded substantially in the absence of a solder material between the first semiconductor device and the second semiconductor device. 
     
     
         7 . The semiconductor apparatus of  claim 3 , wherein a center of the first conductive portion is aligned with a center of the second conductive portion. 
     
     
         8 . The semiconductor apparatus of  claim 3 , wherein the first conductive portion comprises copper, and the second temperature is substantially between 300° C. and 450° C. 
     
     
         9 . A method for preparing a semiconductor apparatus, comprising:
 forming a first semiconductor device having a first conductive portion, a first dielectric portion adjacent to the first conductive portion, and a depression at an upper surface of the first conductive portion;   forming a second semiconductor device having a second conductive portion and a second dielectric portion adjacent to the second conductive portion;   disposing the first semiconductor device and the second semiconductor device in a manner such that the first conductive portion faces the second conductive portion; and   expanding at least one of the first conductive portion and the second conductive portion to fill the depression.   
     
     
         10 . The method for preparing a semiconductor apparatus of  claim 9 , wherein the forming of the first semiconductor device comprises:
 forming a first dielectric layer over a semiconductor substrate;   forming an opening in the first dielectric layer; and   forming the first conductive portion in the opening.   
     
     
         11 . The method for preparing a semiconductor apparatus of  claim 10 , wherein the forming of the first conductive portion in the opening comprises:
 forming a conductive layer over the first dielectric layer and filling the opening;   performing a planarization process to remove a portion of the conductive layer from an upper surface of the first dielectric layer; and   performing a selective etching process to remove an upper portion of the conductive layer in the opening to form the depression.   
     
     
         12 . The method for preparing a semiconductor apparatus of  claim 10 , wherein the forming of the first conductive portion in the opening comprises:
 forming a conductive layer over the first dielectric layer and filling the opening;   performing a first planarization process to remove a portion of the conductive layer from an upper surface of the first dielectric layer;   forming a mask covering the conductive layer in the opening;   forming a second dielectric layer over the first dielectric layer and covering the mask;   performing a second planarization process to remove a portion of the second dielectric layer and expose the mask; and   removing the mask to form a depression.   
     
     
         13 . The method for preparing a semiconductor apparatus of  claim 9 , wherein a coefficient of thermal expansion of the first conductive portion is higher than that of the first dielectric portion, and expanding at least one of the first conductive portion and the second conductive portion comprises performing a thermal treating process that expands a thickness of the first conductive portion more than a thickness of the first dielectric portion. 
     
     
         14 . The method for preparing a semiconductor apparatus of  claim 13 , wherein the first conductive portion having the depression is formed at a first temperature, and the thermal treating process heats at least one of the first conductive portion and the second conductive portion to a second temperature higher than the first temperature. 
     
     
         15 . The method for preparing a semiconductor apparatus of  claim 9 , wherein the depression separates the first conductive portion from the second conductive portion, and the first dielectric portion contacts the second dielectric portion.