Semiconductor device and manufacturing method therefor

Abstract

The present disclosure relates to the technical field of semiconductor processes, and discloses a semiconductor device and a manufacturing method therefor. The semiconductor device includes a substrate; two fins located on the substrate and extending along a first direction; an isolation material layer surrounding the fins, comprising a first isolation regions located at an end region between the two fins along the first direction, and a second isolation region located at sides of the fins along a second direction that is different from the first direction, wherein an upper surface of the first isolation region substantially align with an upper surfaces of the fins, and an upper surface of the second isolation region is lower than the upper surface of the fins; and a first insulating layer on the first isolation region

What is claimed is: 
     
         1 . A semiconductor device, comprising:
 a substrate;   a fin located on the substrate and extending along a first direction;   an isolation material layer surrounding the fin, comprising:
 a first isolation region located at an end region of the fin along the first direction; and 
 a second isolation region located at sides of the fin along a second direction that is different from the first direction, 
 wherein an upper surface of the first isolation region substantially align with an upper surface of the fin, and an upper surface of the second isolation region is lower than the upper surface of the fin; and 
   a first insulating layer on the first isolation region.   
     
     
         2 . The device according to  claim 1 , wherein the first insulating layer further covers an end portion of the fin adjacent to the first isolation region. 
     
     
         3 . The device according to  claim 1 , further comprising:
 a first gate structure on the fin, and a second gate structure on the first insulating layer.   
     
     
         4 . The device according to  claim 3 , further comprising:
 a source region and a drain region formed by epitaxially growing a semiconductor material in the fin at two sides of the first gate structure, the two sides corresponding to two ends of the fin along the first direction.   
     
     
         5 . The device according to  claim 4 , wherein the epitaxially grown semiconductor material comprises SiGe or SiC. 
     
     
         6 . The device according to  claim 3 , wherein:
 the first gate structure comprises a first gate dielectric layer on the fin, a first gate on the first gate dielectric layer, a first hard mask layer on the first gate, and a first spacer at side walls of the first gate dielectric layer, the first gate, and the first hard mask layer along the second direction; and   the second gate structure comprises a second gate dielectric layer on the remaining first insulating layer, a second gate on the second gate dielectric layer, a second hard mask layer on the second gate, and a second spacer at side walls of the second gate dielectric layer, the second gate, and the second hard mask layer along the second direction, wherein the second spacer is above and overlaps an end portion of the fin adjacent to the first isolation region below the second gate structure.   
     
     
         7 . The device according to  claim 6 , wherein:
 the first gate dielectric layer and the second gate dielectric layer comprise silicon oxide;   the first gate and the second gate comprise polysilicon; and   the first hard mask layer and the second hard mask layer comprise silicon nitride.