Semiconductor Devices Having a Membrane Layer with Smooth Stress-Relieving Corrugations and Methods of Fabrication Thereof

Abstract

In one embodiment, a method of manufacturing a semiconductor device includes oxidizing a substrate to form local oxide regions that extend above a top surface of the substrate. A membrane layer is formed over the local oxide regions and the top surface of the substrate. A portion of the substrate under the membrane layer is removed. The local oxide regions under the membrane layer are removed.

What is claimed is: 
     
         1 . A method of manufacturing a semiconductor device, the method comprising:
 forming a plurality of features in a substrate, wherein the plurality of features comprise a plurality of trenches formed by isotropic etching;   forming a membrane layer over the substrate comprising the plurality of features; and   removing a portion of the substrate under the membrane layer.   
     
     
         2 . The method of  claim 1 , wherein forming the plurality of features comprises:
 oxidizing a substrate to form first local oxide regions extending above a top surface of the substrate; and   forming the plurality of features by removing the first local oxide regions after oxidizing.   
     
     
         3 . The method of  claim 1 , wherein forming the membrane layer comprises depositing a poly silicon layer. 
     
     
         4 . The method of  claim 1 , further comprising:
 forming a plurality of bumps over the membrane layer; and   forming a back plate layer over the plurality of bumps.   
     
     
         5 . The method of  claim 4 , further comprising:
 forming a first contact to the substrate;   forming a second contact to the back plate layer; and   forming a third contact to the membrane layer.   
     
     
         6 . The method of  claim 4 , wherein forming the back plate layer comprises depositing a layer comprising silicon. 
     
     
         7 . The method of  claim 4 , further comprising:
 before forming the plurality of bumps, forming a sacrificial layer over the membrane layer, the sacrificial layer having bump holes;   forming the plurality of bumps by depositing a bump liner over the sacrificial layer; and   removing the sacrificial layer between the membrane layer and the back plate layer.   
     
     
         8 . The method of  claim 1 , further comprising:
 before forming the plurality of features, depositing a masking layer, wherein the masking layer comprises a stack comprising SiO 2 /SiN, SiO 2 /Poly Silicon/SiN, or SiO 2 /amorphous silicon/SiN; and   patterning the masking layer for forming the plurality of features.   
     
     
         9 . The method of  claim 1 , further comprising:
 depositing a liner over the plurality of features before forming the membrane layer.   
     
     
         10 . The method of  claim 1 , wherein the plurality of features comprise protrusions of the substrate. 
     
     
         11 .. The method of  claim 10 , wherein the protrusions comprises local oxidation regions. 
     
     
         12 . The method of  claim 1 , wherein the membrane layer is supported by a plurality of support structures, the plurality of support structures comprise a first support and a second support oriented orthogonally to the first support. 
     
     
         13 . The method of  claim 12 , wherein the first support comprises corrugations. 
     
     
         14 . A method of manufacturing a semiconductor device, the method comprising:
 forming a membrane layer comprising a plurality of corrugations over a substrate, each corrugation of the plurality of corrugations having a sidewall, a top surface, and a bottom surface, wherein a radius of curvature of an edge connecting the sidewall and the bottom surface is greater than a thickness of the membrane layer, and wherein a radius of curvature of an edge connecting the sidewall and the top surface is greater than the thickness of the membrane layer; and   a cavity disposed in the substrate under the membrane layer, wherein the membrane layer comprises a spring supported membrane.   
     
     
         15 . The method of  claim 14 , wherein a radius of curvature of an edge connecting the sidewall and the bottom surface is greater than about 100 nm, and wherein a radius of curvature of an edge connecting the sidewall to a top surface is greater than about 100 nm, wherein the top surface is opposite to the bottom surface separated by the sidewall. 
     
     
         16 . The method of  claim 14 , further comprising:
 forming a plurality of bumps over the membrane layer; and   forming a back plate layer over the plurality of bumps, wherein the membrane layer comprises poly silicon.   
     
     
         17 . The method of  claim 16 , further comprising:
 forming a first gap between the plurality of bumps and the membrane layer; and   forming a second gap under the membrane layer so that a central portion of the membrane layer is moveable.   
     
     
         18 . The method of  claim 17 , wherein a central portion of the membrane layer is configured to move up into the first gap towards the plurality of bumps and down into the second gap towards the substrate. 
     
     
         19 . The method of  claim 14 , wherein the membrane layer comprises a circular membrane. 
     
     
         20 . A method of manufacturing a semiconductor device, the method comprising:
 forming a plurality of features in a substrate, wherein the plurality of features comprise protrusions of the substrate, wherein the protrusions comprise a same material as the substrate;   forming a membrane layer over the substrate comprising the plurality of features; and   removing a portion of the substrate under the membrane layer.