Semiconductor device package

Abstract

A semiconductor device package includes: (1) a conductive base comprising a sidewall, a cavity defined from a first surface of the conductive base, the cavity having a bottom surface and a depth; (2) a semiconductor die disposed on the bottom surface of the cavity, the semiconductor die having a first surface and a second surface opposite the first surface, the second surface of the semiconductor die bonded to the bottom surface of the cavity; and (3) a first insulating material covering the sidewall of the conductive base and extending to a bottom surface of the conductive base.

1 - 20 . (canceled) 
     
     
         21 . A semiconductor device package, comprising:
 a first conductive base comprising a sidewall;   a second conductive base;   wherein the first conductive base is electrically connected to the second conductive base;   a semiconductor die disposed on first conductive base, the semiconductor die having a first surface and a second surface opposite the first surface; and   a first insulating material covering the semiconductor die, the second conductive base and the sidewall of the first conductive base.   
     
     
         22 . The semiconductor device package of  claim 21 , the first conductive base further comprises a cavity defined from a first surface of the first conductive base, the cavity having a bottom surface and a depth, the second surface of the semiconductor die bonded to the bottom surface of the cavity. 
     
     
         23 . The semiconductor device package of  claim 21 , wherein the second conductive base further comprises a vertical sidewall and a curved lateral surface, and the vertical sidewall of the second conductive base is coplanar with a lateral surface of the first insulating material. 
     
     
         24 . The semiconductor device package of  claim 21 , wherein the second conductive base further comprises a vertical sidewall and a curved lateral surface, and a portion of the curved lateral surface of the second conductive base faces a bottom surface of the second conductive base. 
     
     
         25 . The semiconductor device package of  claim 21 , further comprising a conductive layer extending from the semiconductor die and disposed on the first insulating material. 
     
     
         26 . The semiconductor device package of  claim 21 , wherein the second conductive base further comprises a vertical sidewall and a curved lateral surface and the vertical sidewall of the second conductive base is exposed and the curved lateral surface of the second conductive base is covered by the first insulating material. 
     
     
         27 . The semiconductor device package of  claim 21 , wherein the first conductive base further comprises a curved lateral surface and the second conductive base further comprises a vertical sidewall and a curved lateral surface, and wherein the curved lateral surface of the first conductive base is opposite to a curved lateral surface of the second conductive base. 
     
     
         28 . The semiconductor device package of  claim 21 , wherein the first insulating material covers the sidewall of the first conductive base. 
     
     
         29 . The semiconductor device package of  claim 21 , wherein the second conductive base comprises a stepped structure, wherein the stepped structure is filled with the first insulating material. 
     
     
         30 . The semiconductor device package of  claim 21 , further comprising a conductive layer extending from the semiconductor die to the second conductive base. 
     
     
         31 . The semiconductor device package of  claim 21 , wherein the second conductive base further comprises a vertical sidewall and a curved lateral surface, and the vertical sidewall of the second conductive base is the outermost surface. 
     
     
         32 . The semiconductor device package of  claim 21 , wherein the first conductive base further comprises a plurality of protrusions from a top view perspective. 
     
     
         33 . A semiconductor device package, comprising:
 a first conductive base comprising:
 a sidewall; 
 a first surface and a second surface opposite the first surface; and 
   a second conductive base;   wherein the first conductive base is electrically connected to the second conductive base;   a semiconductor die disposed on the first conductive base, the semiconductor die having a first surface and a second surface opposite the first surface;   a protection layer disposed on the first conductive base and the semiconductor die, the protection layer having a first surface; and   a first insulating material covering the second conductive base and the sidewall of the first conductive base.   
     
     
         34 . The semiconductor device package of  claim 33 , the first conductive base further comprises a cavity defined from the first surface of the first conductive base, the cavity having a bottom surface and a depth, the second surface of the semiconductor die bonded to the bottom surface of the cavity. 
     
     
         35 . The semiconductor device package of  claim 33 , wherein the second conductive base further comprises a vertical sidewall and a curved lateral surface, and a portion of the curved lateral surface of the second conductive base faces a bottom surface of the second conductive base and wherein the vertical sidewall of the second conductive base is a singulation portion. 
     
     
         36 . The semiconductor device package of  claim 33 , further comprising a conductive layer extending from the semiconductor die and disposed on the first insulating material. 
     
     
         37 . The semiconductor device package of  claim 33 , wherein the second conductive base further comprises a vertical sidewall and a curved lateral surface, and the vertical sidewall of the second conductive base is exposed and the curved lateral surface of the second conductive base is covered by the first insulating material. 
     
     
         38 . The semiconductor device package of  claim 33 , wherein the first conductive base further comprises a curved lateral surface and the second conductive base further comprises a vertical sidewall and a curved lateral surface, and wherein the curved lateral surface of the first conductive base is opposite to the curved lateral surface of the second conductive base. 
     
     
         39 . A semiconductor device package, comprising:
 a first conductive base comprising a sidewall;   a second conductive base comprising a vertical sidewall and a curved lateral surface;   wherein the first conductive base is electrically connected to the second conductive base;   a semiconductor die disposed on first conductive base, the semiconductor die having a first surface and a second surface opposite the first surface; and   a first insulating material covering the semiconductor die and the sidewall of the first conductive base.   
     
     
         40 . The semiconductor device package of  claim 39 , wherein the first conductive base further comprises a curved lateral surface, and wherein the curved lateral surface of the first conductive base is opposite to the curved lateral surface of the second conductive base. 
     
     
         41 . The semiconductor device package of  claim 39 , wherein the vertical sidewall of the second conductive base is coplanar with a lateral surface of the first insulating material.