Magnetic random access memory (mram) structure with small bottom electrode

Abstract

A semiconductor structure and fabrication method of forming a semiconductor structure. The structure is a MRAM element having a first conductive electrode embedded in a first interconnect dielectric material layer upon which a multi-layered magnetic tunnel junction (MTJ) memory element is formed in a magnetoresistive random access memory (MRAM) device area. The first conductive electrode includes a first end having a top surface of a first surface area and a second end having a bottom surface of a second surface area, the first surface area being smaller than the second surface area. The second end of the bottom electrode includes a barrier liner material including a metal fill material, and the first end of the bottom electrode is a pillar structure formed as a result of an etchback process in which the metal barrier liner is recessed relative to the metal fill material.

What is claimed is: 
     
         1 . A method of manufacturing a semiconductor substrate comprising:
 forming and patterning a mask in a mask layer formed above a first interlevel dielectric material layer of an MRAM device;   etching, using said mask, an opening in the first interlevel dielectric material layer, the opening exposing a top surface of a first interconnect contact;   depositing on sidewalls of said opening and on the exposed contact surface of said first interconnect contact a conductive barrier liner material,   depositing in a remaining space within said opening, a metal fill material;   planarizing to render coplanar a top surface of said metal fill, a top surface of said conductive barrier liner and a top surface of said first interlevel dielectric material layer;   recessing the conductive barrier liner for a predetermined depth within the opening and selective to the material metal fill material;   deposit in the recess a further interlevel dielectric material;   planarizing to render coplanar the top surface of said metal fill material, a top surface of said further interlevel dielectric material and the top surface of said first interlevel dielectric material layer;   depositing a second interlevel dielectric layer on top said planarized surface; and   forming a multi-layered magnetic tunnel junction (MTJ) structure disposed in said second interconnection dielectric material layer, said MTJ structure having a top ferromagnetic layer and a bottom ferromagnetic layer, the bottom ferromagnetic layer having a surface in electrical contact with the exposed top surface of said metal fill.   
     
     
         2 . The method of  claim 1 , wherein the forming the MTJ structure further comprises:
 forming a top conductive electrode having a bottom surface in electrical contact with a surface of said top ferromagnetic layer.   
     
     
         3 . The method of  claim 1 , further comprising:
 depositing a passivation layer to cover the top and sidewall surfaces of said top conductive electrode, to cover sidewall surfaces of said formed MTJ stack and further to cover remaining exposed surfaces of said second interlevel dielectric layer.   
     
     
         4 . The method of  claim 3 , further comprising:
 depositing a third interlevel dielectric layer on top of said passivation layer;   planarizing a surface of said third interlevel dielectric layer; and   forming a top conductive contact within said third interconnect dielectric material layer, the top conductive contact having a bottom surface in electrical contact with a top surface of said top conductive electrode.   
     
     
         5 . The method of  claim 4 , wherein said forming a top conductive contact comprises:
 forming and patterning a mask in a mask layer formed above a top surface of said third interlevel dielectric material layer of an MRAM device;   etching, using said mask, an opening in the third interlevel dielectric material layer, said opening extending through said passivation layer and selective to a material of said top conductive electrode to expose a surface of said top conductive electrode.   
     
     
         6 . The method of  claim 2 , wherein said depositing the metal fill forms a pillar structure, said metal fill forming a first end of a bottom conductive electrode of said MTJ structure, wherein the top surface of said metal fill is of a first surface area and a bottom surface of said conductive barrier liner is of a second surface area, the first surface area being smaller than the second surface area. 
     
     
         7 . The method as claimed in  claim 1 , wherein the metal fill structure is of a material selected from the group comprising: a material selected from copper, aluminum, or tungsten, and alloys thereof. 
     
     
         8 . The method as claimed in  claim 1 , wherein said barrier liner material comprises a conductive material selected from the group comprising: Co, Ta, TaN, Ti, TiN, Ru, RuN, RuTa, RuTaN, W, or WN or a material stack of diffusion barrier material. 
     
     
         9 . The method as claimed in  claim 1 , further comprising:
 forming a conductive MTJ cap layer on a surface of the top ferromagnetic layer of said MTJ structure prior to forming the top conductive electrode, a bottom surface of said top conductive electrode contacting a surface of the MTJ cap layer.   
     
     
         10 . The method as claimed in  claim 9 , wherein the formed top conductive electrode forms a hardmask, the multi-layered MTJ stack results from a physical etching of said multi-layered MTJ and said MTJ cap layer, wherein outermost sidewalls of both the MTJ cap and the MTJ structure are vertically aligned to outermost sidewalls of said top conductive electrode mask. 
     
     
         11 . The method as claimed in  claim 10 , wherein depositing said passivation layer comprises: depositing a metal oxide material on sidewall surfaces and top surface of said aligned MTJ stack.