US2022254631A1PendingUtilityA1

Porous rf switch for reduced crosstalk

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Assignee: IQE PLCPriority: Jul 19, 2019Filed: Apr 29, 2022Published: Aug 11, 2022
Est. expiryJul 19, 2039(~13 yrs left)· nominal 20-yr term from priority
Inventors:Richard HammondDrew NelsonAlan GottRodney PelzelAndrew Clark
H10P 14/3256H10P 90/00H10P 50/613H10P 50/00H10P 14/6349H10P 14/3251H10P 14/665H10W 44/20H10P 14/2905H10P 14/3411H10P 14/3238H10P 14/2926H10P 14/3211H10D 62/405H10D 62/102H10D 30/60H01L 29/045H01L 23/66H01L 21/02505H01L 21/306H01L 21/02513H01L 21/02203H01L 21/3063H01L 21/02002H01L 21/02381H01L 29/0607H01L 21/02293
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Claims

Abstract

A layered structure includes a substrate, a porous layer over the substrate, an epitaxial layer grown directly over the porous layer, and a semiconductor device in the epitaxial layer. The porous layer has a higher resistivity than the substrate. A porosity of the porous layer reduces radio frequency (RF) bleeding from the semiconductor device into the substrate.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A layered structure comprising:
 a substrate;   a porous layer over the substrate, the porous layer having a higher resistivity than the substrate;   an epitaxial layer grown directly over the porous layer; and   a semiconductor device in the epitaxial layer,   wherein a porosity of the porous layer reduces radio frequency (RF) bleeding from the semiconductor device into the substrate.   
     
     
         2 . The layered structure of  claim 1 , wherein the porosity of the porous layer is between about 35% and about 65%. 
     
     
         3 . The layered structure of  claim 1 , wherein the porous layer is a fully depleted porous layer that is free of carriers. 
     
     
         4 . The layered structure of  claim 1 , wherein the porosity of the porous layer is graded with a higher porosity adjacent to an interface with the substrate than a porosity adjacent to an interface with the epitaxial layer. 
     
     
         5 . The layered structure of  claim 1 , wherein the semiconductor device comprises a transistor of a radio frequency (RF) switch. 
     
     
         6 . The layered structure of  claim 1 , wherein the substrate is a silicon wafer or a  111 -V semiconductor wafer. 
     
     
         7 . A layered structure comprising:
 a substrate;   a porous layer over the substrate, the porous layer having a higher resistivity than the substrate;   an epitaxial layer grown directly over the porous layer; and   a transistor of a radio frequency (RF) switch in the epitaxial layer,   wherein a porosity of the porous layer reduces radio frequency (RF) bleeding from the transistor into the substrate.   
     
     
         8 . The layered structure of  claim 7 , wherein a second harmonic distortion of the layered structure is less than about −120 dBm at P in =15 dBm. 
     
     
         9 . The layered structure of  claim 8 , wherein the second harmonic distortion of the layered structure is less than about −140 dBm at P in =15 dBm. 
     
     
         10 . The layered structure of  claim 7 , wherein a transmission loss of the layered structure is less than about 0.2 dB/mm. 
     
     
         11 . A method comprising:
 forming a porous layer over a wafer, the porous layer having a higher resistivity than the wafer;   growing an epitaxial layer directly over the porous layer; and   forming a semiconductor device in the epitaxial layer,   wherein a porosity of the porous layer reduces radio frequency (RF) bleeding from the semiconductor device into the wafer.   
     
     
         12 . The method of  claim 11 , wherein forming the porous layer comprises forming the porous layer over an entirety of the wafer. 
     
     
         13 . The method of  claim 11 , wherein forming the porous layer comprises a dry-in and dry-out porosification process. 
     
     
         14 . The method of  claim 13 , wherein the dry-in and dry-out porosification process comprises:
 exposing the wafer to an acid solution;   passing an electrolyzing current through the wafer and the acid solution to form the porous layer; and   drying the porous layer.   
     
     
         15 . The method of  claim 11 , wherein the semiconductor device comprises a transistor of a radio frequency (RF) switch. 
     
     
         16 . The method of  claim 11 , further comprising annealing the porous layer prior to growing the epitaxial layer. 
     
     
         17 . The method of  claim 11 , wherein growing the epitaxial layer comprises growing the epitaxial layer with a crystal orientation that matches a crystal orientation of the wafer. 
     
     
         18 . The method of  claim 11 , wherein the porosity of the porous layer is between about 35% and about 65%. 
     
     
         19 . The method of  claim 11 , wherein forming the porous layer comprises porosifying an upper portion of the wafer. 
     
     
         20 . The method of  claim 11 , wherein the wafer comprises a silicon wafer.

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