Layout versus schematic (lvs) device extraction using pattern matching

Abstract

A method includes obtaining a target integrated circuit (IC) layout, accessing a repository, identifying a device within the target IC layout by matching an area of the target IC layout to a source pattern, and replacing at least a portion of the area of the target IC layout with a replacement pattern. The repository stores the source pattern for the device and the replacement pattern corresponding to the source pattern.

What is claimed is: 
     
         1 . A method, comprising:
 obtaining a target integrated circuit (IC) layout;   accessing a repository storing:
 a source pattern for a device; and 
 a replacement pattern corresponding to the source pattern; 
   identifying, using one or more processors, the device within the target IC layout by matching an area of the target IC layout to the source pattern; and   replacing, using the one or more processors, at least a portion of the area of the target IC layout with the replacement pattern.   
     
     
         2 . The method of  claim 1 , wherein the source pattern comprises a plurality of device layers including a poly layer. 
     
     
         3 . The method of  claim 1 , wherein the replacement pattern comprises a plurality of marker layers including a body layer or a terminal layer. 
     
     
         4 . The method of  claim 1 , wherein the matching comprises scaling a dimension of the source pattern. 
     
     
         5 . The method of  claim 1 , further comprising:
 acquiring from a manufacturer database information associated with a cell; and   generating the replacement pattern by applying a Boolean operation into a device layer of the cell.   
     
     
         6 . The method of  claim 5 , further comprising:
 associating an identifier with the cell; and   extracting the replacement pattern based on the identifier.   
     
     
         7 . The method of  claim 1 , wherein the repository includes sizing information associated with the source pattern, and the method further comprising:
 identifying the device based on the sizing information.   
     
     
         8 . The method of  claim 1 , further comprising:
 determining the replacement pattern based on a relative location of the replacement pattern from a pattern extent of the source pattern.   
     
     
         9 . A system, comprising:
 a repository storing:
 a source pattern for a device; and 
 a replacement pattern corresponding to the source pattern; 
   a memory storing instructions; and   a processor, coupled with the memory and to execute the instructions, the instructions when executed cause the processor to:
 obtain a target integrated circuit (IC) layout; 
 identify the device within the target IC layout by matching an area of the target IC layout to the source pattern; and 
   replace at least a portion of the area of the target IC layout with the replacement pattern.   
     
     
         10 . The system of  claim 9 , wherein the source pattern comprises a plurality of device layers including a poly layer. 
     
     
         11 . The system of  claim 9 , wherein the replacement pattern comprises a plurality of marker layers including a body layer or a terminal layer. 
     
     
         12 . The system of  claim 9 , wherein the matching comprises scaling a dimension of the source pattern. 
     
     
         13 . The system of  claim 9 , wherein the processor is further configured to:
 acquire from a manufacturer database information associated with a cell; and   generate the replacement pattern by applying a Boolean operation into a device layer of the cell.   
     
     
         14 . The system of  claim 13 , wherein the processor is further configured to:
 associate an identifier with the cell; and   extract the replacement pattern based on the identifier.   
     
     
         15 . The system of  claim 9 , wherein the repository includes sizing information associated with the source pattern, and the processor is further configured to:
 identify the device based on the sizing information.   
     
     
         16 . The system of  claim 9 , wherein the processor is further configured to:
 determine the replacement pattern based on a relative location of the replacement pattern from a pattern extent of the source pattern.   
     
     
         17 . A non-transitory computer readable medium comprising stored instructions, the instructions, which when executed by a processor, cause the processor to:
 generate a pattern library, wherein the pattern library comprises a source pattern of a device and a replacement pattern corresponding to the source pattern;   acquire an input integrated circuit (IC) design;   perform pattern matching between the input IC design and the pattern library; and   output the replacement pattern corresponding to a matched source pattern.   
     
     
         18 . The non-transitory computer readable medium of  claim 17 , wherein the source pattern comprises a plurality of device layers including a poly layer. 
     
     
         19 . The non-transitory computer readable medium of  claim 17 , wherein the processor is configured to:
 acquire from a manufacturer database information associated with a cell; and   generate the replacement pattern by applying a Boolean operation into a device layer of the cell.   
     
     
         20 . The non-transitory computer readable medium of  claim 17 , wherein the repository includes sizing information associated with the source pattern, and the processor is configured to:
 identify the device based on the sizing information.